公开(公告)号：US20200027260A1

公开(公告)日：2020-01-23

申请号：US16504069

申请日：2019-07-05

Applicant: Arm Limited

Inventor： Peter William Harris ,  Edvard Fielding

IPC: G06T15/04 ,  G06T15/00 ,  G06T1/20

Abstract: When a renderer of a graphics processor is to perform a graphics rendering operation that uses one or more texture layers in accordance with contribution control data that controls the contribution that each texture layer makes to the rendering operation for a group of fragments, the renderer determines contribution control data for each fragment in the group, and based on the determined contribution control data, either: fetches and uses the texture data values for a texture layer for each fragment in the group from memory, or does not fetch texture data values for a texture layer for each fragment in the group from memory and instead uses a dummy value for the texture layer for each fragment in the group for the graphics rendering operation.

公开(公告)号：US20190096025A1

公开(公告)日：2019-03-28

申请号：US16139408

申请日：2018-09-24

Applicant: Arm Limited

Inventor： Jorn Nystad ,  Carmelo Giliberto ,  Edvard Fielding

IPC: G06T1/20 ,  G06T1/60 ,  G06T11/00 ,  G06T15/00

Abstract: A texture mapping apparatus, e.g. of a graphics processing unit, comprises texture fetching circuitry operable to receive a set of weight values for a convolution operation and fetch from memory a set of input data values on which the convolution operation is to be performed. The texture mapping apparatus further comprises texture filtering circuitry operable to perform a convolution operation using the set of received weight values and the set of fetched input data values. The texture mapping apparatus can allow a graphics processing unit to perform a variety of convolution operations in an efficient manner.

公开(公告)号：US20180217934A1

公开(公告)日：2018-08-02

申请号：US15423497

申请日：2017-02-02

Applicant: ARM Limited

Inventor： Andreas Due Engh-Halstvedt ,  Edvard Fielding

IPC: G06F12/0868 ,  G06F12/0875 ,  G06F12/0891 ,  G06F12/0897

CPC classification number: G06F12/0897 ,  G06F12/0875 ,  G06F12/126 ,  G06F12/128 ,  G06F2212/1016 ,  G06F2212/302 ,  G06F2212/455

Abstract: When a data processing operation requires data that is stored in a first cache and the fetching of the data into the first cache is dependent upon data stored in another cache, and an attempt to read the data from the first cache “misses”, the data processing operation is added to a record of data processing operations that have missed in the first cache and the data that is required for the data processing operation is fetched into the first cache by reading the data that is required to fetch the data into the first cache from the another cache and then using that data from the another cache to fetch the required data into the first cache. When the data that is required for the data processing operation has been fetched into the first cache, the data processing operation is performed using the fetched data.