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公开(公告)号：US20170024848A1
公开(公告)日：2017-01-26
申请号：US15214170
申请日：2016-07-19
Applicant: ARM Limited
Inventor： Peter William Harris
IPC: G06T1/20
Abstract: The sequence of instructions for a shader program 60 to be executed by a shader core of a graphics processor is divided into an initial set of instructions 61 that perform “global” common expressions of the shader program, a set of instructions 62 in the shader program that perform expressions that are common to a given work group within a set of work items that the shader program is to process, and a main instruction sequence 63 that needs to be executed independently for each work item.Execution threads are then able to start executing the shader program either at the beginning of the global common expressions 64, or at the beginning of the work group common expressions 65, or at the beginning of the main instruction sequence 66.
Abstract translation: 执行线程然后能够在全局公用表达式64的开始处或者在工作组公共表达式65的开始处或者在主指令序列66的开始处开始执行着色器程序。
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公开(公告)号：US10726606B2
公开(公告)日：2020-07-28
申请号：US16279882
申请日：2019-02-19
Applicant: Arm Limited
Inventor： Peter William Harris , Mladen Wilder
Abstract: When a shader program is to be executed by a graphics processor, the graphics processor is caused to execute at least two variants of the shader program and the operation of the graphics processor when executing execution threads for the different variants of the shader program is monitored.A variant of the shader program to be executed by subsequent execution threads that are to execute the shader program is then selected based on the monitoring of the operation of the shading stage when executing the execution threads for the different variants of the shader program.
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公开(公告)号：US10332258B2
公开(公告)日：2019-06-25
申请号：US15479280
申请日：2017-04-05
Applicant: ARM Limited
Inventor： Amir Kleen , Peter William Harris , David James Bermingham
Abstract: A graphics processing system sorts graphics primitives for rendering into lists corresponding to different sub-regions of a render output to be generated, each list indicating primitives to be processed for the render output. A primitive list building unit divides a render target into various sub-regions, determines which sub-regions a primitive falls within and adds the primitive to the primitive lists corresponding to those sub-regions. The primitive list building unit also records the positions of the primitives in a pair of histograms which show the distribution of primitives across the render output. Once all primitives for the render output have been sorted into lists, the histograms are outputted to a predictor processor. The predictor processor then determines a set of sub-region sizes to be used when sorting primitives for the next render output to be generated into lists, based on the histograms.
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公开(公告)号：US20170309027A1
公开(公告)日：2017-10-26
申请号：US15479280
申请日：2017-04-05
Applicant: ARM Limited
Inventor： Amir Kleen , Peter William Harris , David James Bermingham
CPC classification number: G06T7/11 , G06T1/20 , G06T1/60 , G06T11/40 , G06T15/005 , G06T15/40 , G06T17/20 , G06T2207/20021 , G06T2210/12 , G06T2210/36
Abstract: A graphics processing system sorts graphics primitives for rendering into lists corresponding to different sub-regions of a render output to be generated, each list indicating primitives to be processed for the render output. A primitive list building unit divides a render target into various sub-regions, determines which sub-regions a primitive falls within and adds the primitive to the primitive lists corresponding to those sub-regions. The primitive list building unit also records the positions of the primitives in a pair of histograms which show the distribution of primitives across the render output. Once all primitives for the render output have been sorted into lists, the histograms are outputted to a predictor processor. The predictor processor then determines a set of sub-region sizes to be used when sorting primitives for the next render output to be generated into lists, based on the histograms.
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公开(公告)号：US12026798B2
公开(公告)日：2024-07-02
申请号：US17120744
申请日：2020-12-14
Applicant: Arm Limited
Inventor： Andreas Loeve Selvik , Samuel Martin , Peter William Harris , Jakob Axel Fries
CPC classification number: G06T1/20 , G06T3/40 , G06T7/11 , G06T15/005
Abstract: A graphics processor performs graphics processing in respect of a region of a render output. The graphics processing comprises obtaining a scaling factor corresponding to a desired resolution for the region. The graphics processing further comprises, in accordance with the desired resolution, obtaining scaled graphics geometry to be rendered for the region and selecting a subregion of the region to be rendered in respect of the region. The selected subregion is then rendered using the scaled graphics geometry, thereby providing a subregion of data elements rendered in accordance with the desired resolution. The graphics processor can provide efficient and flexible graphics processing when performing variable resolution rendering.
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Patent Agency Ranking
公开(公告)号：US20210097642A1
公开(公告)日：2021-04-01
申请号：US17120744
申请日：2020-12-14
Applicant: Arm Limited
Inventor： Andreas Loeve Selvik , Samuel Martin , Peter William Harris , Jakob Axel Fries
Abstract: A graphics processor performs graphics processing in respect of a region of a render output. The graphics processing comprises obtaining a scaling factor corresponding to a desired resolution for the region. The graphics processing further comprises, in accordance with the desired resolution, obtaining scaled graphics geometry to be rendered for the region and selecting a subregion of the region to be rendered in respect of the region. The selected subregion is then rendered using the scaled graphics geometry, thereby providing a subregion of data elements rendered in accordance with the desired resolution. The graphics processor can provide efficient and flexible graphics processing when performing variable resolution rendering.
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公开(公告)号：US20200082491A1
公开(公告)日：2020-03-12
申请号：US16127062
申请日：2018-09-10
Applicant: Arm Limited
Inventor： Peter William Harris
Abstract: When executing a shader program to perform graphics shading operations in a graphics processor, the graphics processor determines for instructions to be executed for the shader program, whether to replace the instructions with alternative instructions, based on the nature of the instructions and the values of input operands to be processed by the instructions, and either retains an instruction or replaces the instruction with an alternative instruction, accordingly.
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公开(公告)号：US10275848B2
公开(公告)日：2019-04-30
申请号：US15214170
申请日：2016-07-19
Applicant: ARM Limited
Inventor： Peter William Harris
Abstract: The sequence of instructions for a shader program 60 to be executed by a shader core of a graphics processor is divided into an initial set of instructions 61 that perform “global” common expressions of the shader program, a set of instructions 62 in the shader program that perform expressions that are common to a given work group within a set of work items that the shader program is to process, and a main instruction sequence 63 that needs to be executed independently for each work item.Execution threads are then able to start executing the shader program either at the beginning of the global common expressions 64, or at the beginning of the work group common expressions 65, or at the beginning of the main instruction sequence 66.
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公开(公告)号：US20160247249A1
公开(公告)日：2016-08-25
申请号：US15049392
申请日：2016-02-22
Applicant: ARM Limited
CPC classification number: G06T9/00 , G06T11/40 , G06T15/005
Abstract: A graphics processing pipeline includes processing circuitry. The processing circuitry is configured to determine attribute information for an object to be rendered for a set of sampling points from a compressed representation of attribute information associated with the object, when the set of sampling points is being processed by the graphics processing pipeline to generate a render output. The processing circuitry is also configured to use the determined attribute information to control the processing of the set of sampling points by the graphics processing pipeline when generating the render output.
Abstract translation: 图形处理流水线包括处理电路。 所述处理电路被配置为当所述采样点集合被所述图形处理流水线处理以产生一个或多个采样点时，从与所述对象相关联的属性信息的压缩表示中，为一组采样点确定要渲染的对象的属性信息 渲染输出。 处理电路还被配置为使用所确定的属性信息来在生成渲染输出时由图形处理流水线控制该组采样点的处理。
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公开(公告)号：US10943385B2
公开(公告)日：2021-03-09
申请号：US16504069
申请日：2019-07-05
Applicant: Arm Limited
Inventor： Peter William Harris , Edvard Fielding
Abstract: When a renderer of a graphics processor is to perform a graphics rendering operation that uses one or more texture layers in accordance with contribution control data that controls the contribution that each texture layer makes to the rendering operation for a group of fragments, the renderer determines contribution control data for each fragment in the group, and based on the determined contribution control data, either: fetches and uses the texture data values for a texture layer for each fragment in the group from memory, or does not fetch texture data values for a texture layer for each fragment in the group from memory and instead uses a dummy value for the texture layer for each fragment in the group for the graphics rendering operation.
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