公开(公告)号：US11011496B2

公开(公告)日：2021-05-18

申请号：US16563716

申请日：2019-09-06

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Tang-Yuan Chen ,  Meng-Kai Shih ,  Teck-Chong Lee ,  Shin-Luh Tarng ,  Chih-Pin Hung

IPC: H01L21/56 ,  H01L23/528 ,  H01L23/00 ,  H01L25/065

Abstract: A semiconductor device package includes a first conductive layer, a second conductive layer and a third conductive layer. The first conductive layer has a first pitch. The second conductive layer has a second pitch and is arranged at two different sides of the first conductive layer. The third conductive layer has a third pitch and is disposed above the first conductive layer and the second conductive layer. The third conductive layer is electrically connected to the first conductive layer. The first pitch is smaller than the third pitch, and the third pitch is smaller than the second pitch.

公开(公告)号：US10916429B2

公开(公告)日：2021-02-09

申请号：US16705018

申请日：2019-12-05

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： John Richard Hunt ,  William T. Chen ,  Chih-Pin Hung ,  Chen-Chao Wang

IPC: H01L21/00 ,  H01L21/108 ,  H01L23/16 ,  H01L21/56 ,  H01L23/00 ,  H01L21/683 ,  H01L23/538 ,  H01L21/768 ,  H01L23/04 ,  H01L23/48 ,  H01L23/485 ,  H01L23/528 ,  H01L25/065 ,  H01L27/108 ,  H01L23/31

Abstract: A semiconductor device package includes: a redistribution stack including a dielectric layer defining a first opening; and a redistribution layer (RDL) disposed over the dielectric layer and including a first trace, wherein the first trace includes a first portion extending over the dielectric layer along a first longitudinal direction adjacent to the first opening, and a second portion disposed in the first opening and extending from the first portion of the first trace, wherein the second portion of the first trace has a maximum width along a first transverse direction orthogonal to the first longitudinal direction, the first opening in the dielectric layer has a maximum width along the first transverse direction, and the maximum width of the second portion of the first trace is less than the maximum width of the first opening.

公开(公告)号：US10770369B2

公开(公告)日：2020-09-08

申请号：US16112248

申请日：2018-08-24

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chih-Pin Hung ,  Tang-Yuan Chen ,  Jin-Feng Yang ,  Meng-Kai Shih

IPC: H01L23/34 ,  H01L23/367 ,  H01L23/538 ,  H01L23/00

Abstract: A semiconductor device package includes a substrate, a first electronic component, a second electronic component, a heat dissipation lid and a thermal isolation. The substrate has a surface. The first electronic component and the second electronic component are over the surface of the substrate and arranged along a direction substantially parallel to the surface. The first electronic component and the second electronic component are separated by a space therebetween. The heat dissipation lid is over the first electronic component and the second electronic component. The heat dissipation lid defines one or more apertures at least over the space between the first electronic component and the second electronic component. The thermal isolation is in the one or more apertures of the heat dissipation lid.

公开(公告)号：US10535521B2

公开(公告)日：2020-01-14

申请号：US16297480

申请日：2019-03-08

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： John Richard Hunt ,  William T. Chen ,  Chih-Pin Hung ,  Chen-Chao Wang

IPC: H01L21/00 ,  H01L21/108 ,  H01L23/16 ,  H01L21/56 ,  H01L23/00 ,  H01L21/683 ,  H01L23/538 ,  H01L21/768 ,  H01L23/04 ,  H01L23/48 ,  H01L23/485 ,  H01L23/528 ,  H01L25/065 ,  H01L27/108 ,  H01L23/31

Abstract: A method of forming a semiconductor device package includes: (1) providing an electronic device including an active surface and a contact pad adjacent to the active surface; (2) forming a package body encapsulating portions of the electronic device; and (3) forming a redistribution stack, including: forming a dielectric layer over a front surface of the package body, the dielectric layer defining a first opening exposing at least a portion of the contact pad; and forming a redistribution layer (RDL) over the dielectric layer, the RDL including a first trace, wherein the first trace includes a first portion extending over the dielectric layer along a first longitudinal direction adjacent to the first opening, and a second portion disposed in the first opening and extending between the first portion of the first trace and the exposed portion of the contact pad, wherein the second portion of the first trace has a maximum width along a first transverse direction orthogonal to the first longitudinal direction, and the maximum width of the second portion of the first trace is no greater than 3 times of a width of the first portion of the first trace, wherein the second portion of the first trace is disposed between and spaced from opposing sidewalls of the dielectric layer defining the first opening.

公开(公告)号：US10236208B2

公开(公告)日：2019-03-19

申请号：US15184828

申请日：2016-06-16

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chin-Cheng Kuo ,  Pao-Nan Lee ,  Chih-Pin Hung ,  Ying-Te Ou

IPC: H01L21/768 ,  H01L23/48 ,  H01L23/522 ,  H01L23/528 ,  H01L23/00

Abstract: The present disclosure relates to a semiconductor package structure and a method of manufacturing the same. The semiconductor package structure includes a semiconductor substrate having a first surface and a second surface opposite the first surface. The semiconductor substrate has a space extending from the second surface to the first surface and an insulation body is disposed in the space. The semiconductor package structure includes conductive posts in the insulation body.