公开(公告)号：US11410934B2

公开(公告)日：2022-08-09

申请号：US16850999

申请日：2020-04-16

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Ian Hu ,  Shin-Luh Tarng

IPC: H01L23/48 ,  H01L23/538 ,  H01L21/48 ,  H01L21/50

Abstract: A substrate, a semiconductor package device and a method of manufacturing a semiconductor device package are provided. The substrate includes a low density wiring structure, a first middle density wiring structure and high density wiring structure. The first middle density wiring structure is electrically connected to the low density wiring structure. The high density wiring structure is electrically connected to the low density wiring structure. The high density wiring structure and the first middle density wiring structure are disposed side by side. A line space of a circuit layer of the low density wiring structure is greater than a line space of a circuit layer of the first middle density wiring structure. The line space of the circuit layer of the first middle density wiring structure is greater than a line space of a circuit layer of the high density wiring structure.

公开(公告)号：US12111114B2

公开(公告)日：2024-10-08

申请号：US17163217

申请日：2021-01-29

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hung-Hsien Huang ,  Shin-Luh Tarng ,  Ian Hu ,  Chien-Neng Liao ,  Jui-Cheng Yu ,  Po-Cheng Huang

IPC: F28D15/04 ,  F28D15/02 ,  F28F13/18

CPC classification number: F28D15/046 ,  F28D15/0233 ,  F28D15/0283 ,  F28F13/187 ,  F28F2255/18

Abstract: A heat transfer element, a method for manufacturing the same and a semiconductor structure including the same are provided. The heat transfer element includes a housing, a chamber, a dendritic layer and a working fluid. The chamber is defined by the housing. The dendritic layer is disposed on an inner surface of the housing. The working fluid is located within the chamber.

公开(公告)号：US10586716B2

公开(公告)日：2020-03-10

申请号：US15619413

申请日：2017-06-09

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Ying-Xu Lu ,  Tang-Yuan Chen ,  Jin-Yuan Lai ,  Tse-Chuan Chou ,  Meng-Kai Shih ,  Shin-Luh Tarng

IPC: H01L23/49 ,  H01L21/56 ,  H01L23/498 ,  H01L23/00 ,  H01L23/13

Abstract: The present disclosure relates to a semiconductor device package including a substrate, a semiconductor device and an underfill. The substrate has a first surface and a second surface angled with respect to the first surface. The semiconductor device is mounted on the first surface of the substrate and has a first surface facing the first surface of the substrate and a second surface angled with respect to the first surface of the substrate. The underfill is disposed between the first surface of the semiconductor device and the first surface of the substrate. The second surface of the substrate is located in the substrate and external to a vertical projection of the semiconductor device on the first surface of the substrate. A distance between the second surface of the substrate and an extension of the second surface of the semiconductor device on the first surface of the substrate is less than or equal to twice a distance between the first surface of the semiconductor device and the first surface of the substrate. The second surface of the substrate extends along at least three sides of the semiconductor device.

公开(公告)号：US11205606B2

公开(公告)日：2021-12-21

申请号：US16730400

申请日：2019-12-30

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hsin-En Chen ,  Hung-Hsien Huang ,  Shin-Luh Tarng

IPC: H01L23/373 ,  H01L23/498

Abstract: A semiconductor device package includes a semiconductor die and an anisotropic thermal conductive structure. The semiconductor die includes a first surface, a second surface opposite to the first surface and edges connecting the first surface to the second surface. The anisotropic thermal conductive structure has different thermal conductivities in different directions. The anisotropic thermal conductive structure includes at least two pairs of film stacks, and each pair of the film stacks comprises a metal film and a nano-structural film alternately stacked. The anisotropic thermal conductive structure comprises a first thermal conductive section disposed on the first surface of the semiconductor die, and the first thermal conductive section is wider than the semiconductor die.

公开(公告)号：US11164756B2

公开(公告)日：2021-11-02

申请号：US16813364

申请日：2020-03-09

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Ying-Xu Lu ,  Tang-Yuan Chen ,  Jin-Yuan Lai ,  Tse-Chuan Chou ,  Meng-Kai Shih ,  Shin-Luh Tarng

IPC: H01L23/13 ,  H01L23/49 ,  H01L21/56 ,  H01L23/498 ,  H01L23/00

Abstract: The present disclosure relates to a semiconductor device package including a substrate, a semiconductor device and an underfill. The substrate has a first surface and a second surface angled with respect to the first surface. The semiconductor device is mounted on the first surface of the substrate and has a first surface facing the first surface of the substrate and a second surface angled with respect to the first surface of the substrate. The underfill is disposed between the first surface of the semiconductor device and the first surface of the substrate. The second surface of the substrate is located in the substrate and external to a vertical projection of the semiconductor device on the first surface of the substrate. A distance between the second surface of the substrate and an extension of the second surface of the semiconductor device on the first surface of the substrate is less than or equal to twice a distance between the first surface of the semiconductor device and the first surface of the substrate. The second surface of the substrate extends along at least three sides of the semiconductor device.

公开(公告)号：US10861726B2

公开(公告)日：2020-12-08

申请号：US16138938

申请日：2018-09-21

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chun Hung Tsai ,  Hsuan Yu Chen ,  Ian Hu ,  Meng-Kai Shih ,  Shin-Luh Tarng

IPC: H01L21/67 ,  G01N21/95 ,  G06T7/00 ,  G01B11/25 ,  G01N21/956

Abstract: An apparatus includes: a first image capture module, a second image capture module, and a first projector. The first image capture module has a first optical axis forming an angle from approximately 70° to approximately 87° with respect to the surface of a carrier. The second image capture module has a first optical axis forming an angle of approximately 90° with respect to the surface of the carrier. The first projector has a first optical axis forming an angle from approximately 40° to approximately 85° with respect to the surface of the carrier.

公开(公告)号：US12166009B2

公开(公告)日：2024-12-10

申请号：US18239722

申请日：2023-08-29

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Tang-Yuan Chen ,  Meng-Kai Shih ,  Teck-Chong Lee ,  Shin-Luh Tarng ,  Chih-Pin Hung

IPC: H01L25/065 ,  H01L21/56 ,  H01L23/00 ,  H01L23/528

Abstract: A semiconductor device package includes a first conductive layer, a second conductive layer and a third conductive layer. The first conductive layer has a first pitch. The second conductive layer has a second pitch and is arranged at two different sides of the first conductive layer. The third conductive layer has a third pitch and is disposed above the first conductive layer and the second conductive layer. The third conductive layer is electrically connected to the first conductive layer. The first pitch is smaller than the third pitch, and the third pitch is smaller than the second pitch.

公开(公告)号：US11742324B2

公开(公告)日：2023-08-29

申请号：US17322764

申请日：2021-05-17

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Tang-Yuan Chen ,  Meng-Kai Shih ,  Teck-Chong Lee ,  Shin-Luh Tarng ,  Chih-Pin Hung

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/528 ,  H01L21/56

CPC classification number: H01L25/0652 ,  H01L21/566 ,  H01L23/5283 ,  H01L24/17 ,  H01L24/33 ,  H01L24/73 ,  H01L2224/0231 ,  H01L2224/02373 ,  H01L2224/02381 ,  H01L2224/73253 ,  H01L2924/3511 ,  H01L2924/381

Abstract: A semiconductor device package includes a first conductive layer, a second conductive layer and a third conductive layer. The first conductive layer has a first pitch. The second conductive layer has a second pitch and is arranged at two different sides of the first conductive layer. The third conductive layer has a third pitch and is disposed above the first conductive layer and the second conductive layer. The third conductive layer is electrically connected to the first conductive layer. The first pitch is smaller than the third pitch, and the third pitch is smaller than the second pitch.

公开(公告)号：US11011496B2

公开(公告)日：2021-05-18

申请号：US16563716

申请日：2019-09-06

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Tang-Yuan Chen ,  Meng-Kai Shih ,  Teck-Chong Lee ,  Shin-Luh Tarng ,  Chih-Pin Hung

IPC: H01L21/56 ,  H01L23/528 ,  H01L23/00 ,  H01L25/065

Abstract: A semiconductor device package includes a first conductive layer, a second conductive layer and a third conductive layer. The first conductive layer has a first pitch. The second conductive layer has a second pitch and is arranged at two different sides of the first conductive layer. The third conductive layer has a third pitch and is disposed above the first conductive layer and the second conductive layer. The third conductive layer is electrically connected to the first conductive layer. The first pitch is smaller than the third pitch, and the third pitch is smaller than the second pitch.