公开(公告)号：US11075186B2

公开(公告)日：2021-07-27

申请号：US15429024

申请日：2017-02-09

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Ian Hu ,  Jia-Rung Ho ,  Jin-Feng Yang ,  Chih-Pin Hung ,  Ping-Feng Yang

IPC: H01L23/00 ,  H01L23/367 ,  H01L23/31 ,  H01L23/04 ,  H01L23/373

Abstract: A semiconductor package includes a substrate, a semiconductor chip and a heat dissipation structure. The semiconductor chip includes a first surface, a second surface opposite to the first surface, and at least one chip pad disposed adjacent to the first surface. The chip pad is electrically connected to the substrate. The heat dissipation structure is disposed adjacent to the second surface of the semiconductor chip and a portion of the substrate. An area of the heat dissipation structure is greater than an area of the semiconductor chip.

公开(公告)号：US10770369B2

公开(公告)日：2020-09-08

申请号：US16112248

申请日：2018-08-24

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chih-Pin Hung ,  Tang-Yuan Chen ,  Jin-Feng Yang ,  Meng-Kai Shih

IPC: H01L23/34 ,  H01L23/367 ,  H01L23/538 ,  H01L23/00

Abstract: A semiconductor device package includes a substrate, a first electronic component, a second electronic component, a heat dissipation lid and a thermal isolation. The substrate has a surface. The first electronic component and the second electronic component are over the surface of the substrate and arranged along a direction substantially parallel to the surface. The first electronic component and the second electronic component are separated by a space therebetween. The heat dissipation lid is over the first electronic component and the second electronic component. The heat dissipation lid defines one or more apertures at least over the space between the first electronic component and the second electronic component. The thermal isolation is in the one or more apertures of the heat dissipation lid.

公开(公告)号：US10410942B2

公开(公告)日：2019-09-10

申请号：US15823467

申请日：2017-11-27

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Tsan-Hsien Chen ,  Ian Hu ,  Jin-Feng Yang ,  Shih-Wei Chen ,  Hui-Chen Hsu

IPC: H01L23/34 ,  H01L23/31 ,  H01L23/433 ,  H01L21/56 ,  H01L23/00 ,  H01L23/373 ,  H01L21/48

Abstract: A semiconductor package device includes a substrate, an electronic component, a bonding wire, a heat spreader, a thermal conductive structure and an encapsulant. The electronic component is disposed on the substrate. The bonding wire connects the electronic component to the substrate. The heat spreader is disposed over the electronic component. The thermal conductive structure is disposed between the heat spreader and the electronic component. The thermal conductive structure includes two polymeric layers and a thermal conductive layer. The conductive layer is disposed between the two polymeric layers. The thermal conductive layer has a first end in contact with the electronic component and a second end in contact with the heat spreader. The encapsulant covers the bonding wire.

公开(公告)号：US11024557B2

公开(公告)日：2021-06-01

申请号：US16566495

申请日：2019-09-10

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hsin-En Chen ,  Ian Hu ,  Jin-Feng Yang

IPC: H01L23/427 ,  H01L23/00

Abstract: A semiconductor package structure includes a package substrate, a semiconductor die, a vapor chamber and a heat dissipating device. The package substrate has a first surface and a second surface opposite to the first surface. The semiconductor die is electrically connected to the first surface of the package substrate. The vapor chamber is thermally connected to a first surface of the semiconductor die. The vapor chamber defines an enclosed chamber for accommodating a first working liquid. The heat dissipating device is thermally connected to the vapor chamber. The heat dissipating device defines a substantially enclosed space for accommodating a second working liquid.

公开(公告)号：US09984983B2

公开(公告)日：2018-05-29

申请号：US15271555

申请日：2016-09-21

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chi-Sheng Chung ,  Kuo-Hsien Liao ,  Jin-Feng Yang ,  Chen-Yin Tai ,  Yung-I Yeh

IPC: H01L23/60 ,  H01L23/00 ,  H01L21/56 ,  H01L21/78 ,  H01L23/31 ,  H01L23/367

CPC classification number: H01L23/60 ,  H01L21/565 ,  H01L21/78 ,  H01L23/3121 ,  H01L23/3675 ,  H01L24/17 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2924/12042 ,  H01L2924/15313 ,  H01L2924/181 ,  H01L2924/19015 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/81

Abstract: The semiconductor package includes a substrate, a die, a first metal layer, a second metal layer and an optional seed layer. The package body at least partially encapsulates the die on the substrate. The seed layer is disposed on the package body and the first metal layer is disposed on the seed layer. The second metal layer is disposed on the first metal layer and the lateral surface of the substrate. The first metal layer and the second metal layer form an outer metal cap that provides thermal dissipation and electromagnetic interference (EMI) shielding.

公开(公告)号：US11482482B2

公开(公告)日：2022-10-25

申请号：US17018701

申请日：2020-09-11

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Ian Hu ,  Jin-Feng Yang ,  Cheng-Yu Tsai ,  Hung-Hsien Huang

IPC: H01L23/498 ,  H01L23/427 ,  H01L21/48 ,  H01L23/00

Abstract: A substrate structure, a method for manufacturing the same and a semiconductor device structure including the same are provided. The substrate structure includes a heat pipe, a first conductive layer and an insulation layer. The heat pipe has an upper surface and a lower surface. The heat pipe includes an opening extending from the upper surface to the lower surface. The first conductive layer is disposed on the upper surface and includes a via structure passing through the opening. The insulation layer is disposed between the heat pipe and the conductive layer.

公开(公告)号：US20170012007A1

公开(公告)日：2017-01-12

申请号：US15271555

申请日：2016-09-21

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chi-Sheng Chung ,  Kuo-Hsien Liao ,  Jin-Feng Yang ,  Chen-Yin Tai ,  Yung-I Yeh

IPC: H01L23/60 ,  H01L21/78 ,  H01L23/31 ,  H01L21/56 ,  H01L23/367 ,  H01L23/00

CPC classification number: H01L23/60 ,  H01L21/565 ,  H01L21/78 ,  H01L23/3121 ,  H01L23/3675 ,  H01L24/17 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2924/12042 ,  H01L2924/15313 ,  H01L2924/181 ,  H01L2924/19015 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/81

Abstract: The semiconductor package includes a substrate, a die, a first metal layer, a second metal layer and an optional seed layer. The package body at least partially encapsulates the die on the substrate. The seed layer is disposed on the package body and the first metal layer is disposed on the seed layer. The second metal layer is disposed on the first metal layer and the lateral surface of the substrate. The first metal layer and the second metal layer form an outer metal cap that provides thermal dissipation and electromagnetic interference (EMI) shielding.

Abstract translation: 半导体封装包括基板，管芯，第一金属层，第二金属层和可选的种子层。 封装体至少部分地将裸片封装在基板上。 种子层设置在包装体上，第一金属层设置在种子层上。 第二金属层设置在第一金属层和基板的侧表面上。 第一金属层和第二金属层形成外部金属帽，其提供散热和电磁干扰（EMI）屏蔽。

公开(公告)号：US09484313B2

公开(公告)日：2016-11-01

申请号：US13779249

申请日：2013-02-27

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chi-Sheng Chung ,  Kuo-Hsien Liao ,  Jin-Feng Yang ,  Chen-Yin Tai ,  Yung-I Yeh

IPC: H01L23/552 ,  H01L23/60 ,  H01L23/00

CPC classification number: H01L23/60 ,  H01L21/565 ,  H01L21/78 ,  H01L23/3121 ,  H01L23/3675 ,  H01L24/17 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2924/12042 ,  H01L2924/15313 ,  H01L2924/181 ,  H01L2924/19015 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/81

Abstract: The semiconductor package includes a substrate, a die, a first metal layer, a second metal layer and an optional seed layer. The package body at least partially encapsulates the die on the substrate. The seed layer is disposed on the package body and the first metal layer is disposed on the seed layer. The second metal layer is disposed on the first metal layer and the lateral surface of the substrate. The first metal layer and the second metal layer form an outer metal cap that provides thermal dissipation and electromagnetic interference (EMI) shielding.

Abstract translation: 半导体封装包括基板，管芯，第一金属层，第二金属层和可选的种子层。 封装体至少部分地将裸片封装在基板上。 种子层设置在包装体上，第一金属层设置在种子层上。 第二金属层设置在第一金属层和基板的侧表面上。 第一金属层和第二金属层形成外部金属帽，其提供散热和电磁干扰（EMI）屏蔽。

公开(公告)号：US10332862B2

公开(公告)日：2019-06-25

申请号：US15698451

申请日：2017-09-07

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Bo-Syun Chen ,  Tang-Yuan Chen ,  Yu-Chang Chen ,  Jin-Feng Yang ,  Chin-Li Kao ,  Meng-Kai Shih

IPC: H01L25/00 ,  H01L25/065

Abstract: A semiconductor package structure includes a first substrate, at least one first semiconductor element and a second substrate. The first semiconductor element is attached to the first substrate. The second substrate defines a cavity and includes a plurality of thermal vias. One end of each of the thermal vias is exposed in the cavity, and the first semiconductor element is disposed within the cavity and thermally connected to the thermal vias.

公开(公告)号：US20140239464A1

公开(公告)日：2014-08-28

申请号：US13779249

申请日：2013-02-27

Applicant: ADVANCED SEMICONDUCTOR ENGINEERING, INC.

Inventor： Chi-Sheng Chung ,  Kuo-Hsien Liao ,  Jin-Feng Yang ,  Chen-Yin Tai ,  Yung-I Yeh

IPC: H01L23/60 ,  H01L21/78

CPC classification number: H01L23/60 ,  H01L21/565 ,  H01L21/78 ,  H01L23/3121 ,  H01L23/3675 ,  H01L24/17 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2924/12042 ,  H01L2924/15313 ,  H01L2924/181 ,  H01L2924/19015 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/81

Abstract: The semiconductor package includes a substrate, a die, a first metal layer, a second metal layer and an optional seed layer. The package body at least partially encapsulates the die on the substrate. The seed layer is disposed on the package body and the first metal layer is disposed on the seed layer. The second metal layer is disposed on the first metal layer and the lateral surface of the substrate. The first metal layer and the second metal layer form an outer metal cap that provides thermal dissipation and electromagnetic interference (EMI) shielding.

Abstract translation: 半导体封装包括基板，管芯，第一金属层，第二金属层和可选的种子层。 封装体至少部分地将裸片封装在基板上。 种子层设置在包装体上，第一金属层设置在种子层上。 第二金属层设置在第一金属层和基板的侧表面上。 第一金属层和第二金属层形成外部金属帽，其提供散热和电磁干扰（EMI）屏蔽。