摘要:
Disclosed encompasses method, system, computer program product for implementing interactive checking of constraints. Various embodiments bridge schematic design environment and layout environment with a binder mapping process and utilize connectivity information from the schematic design to identify constraint violations early in the physical design stage. The method identifies or creates a layout and identifies or generates an object for a modification process. The method may take snapshot(s) of the design database or may use one or more logs for restoring the design database. The method then identifies or creates scratch pad(s) and performs modification process on the object to generate a change. The method uses scratch pad(s) and trigger(s) to perform constraint checking during the modification process to provide interactive feedback in response to the modification process before committing the change to the persistent database.
摘要:
Compounds of the formula I in which A, L1, L2, X and Y have the meanings indicated in Claim 1, are inhibitors of Syk, and can be employed, inter alia, for the treatment of rheumatoid arthritis.
摘要:
A lamp includes a dichroic filter, a light emitting diode, and a lampshade. The light emitting diode emits light towards the dichroic filter. One portion of the light within a predetermined frequency range passes through the dichroic filter. The other portion of the light is refracted by the dichroic filter. The lampshade is used for shading the light. Therefore, the lampshade shows two colors of light.
摘要:
Disclosed herein are representative embodiments of methods and apparatus for managing and allocating hardware resources during RTL synthesis. For example, in one exemplary method disclosed herein, an RTL description of a circuit to be implemented in a target architecture is received. The target architecture of this embodiment comprises a fixed number of hardware resources in a class of hardware resources. One or more operator instances are determined from the RTL description received, where at least some of the operator instances are implementable by the hardware resources in the class of hardware resources. In this embodiment, and prior to initially synthesizing the RTL description into a gate-level netlist, assignment information indicative of how the operator instances are to be implemented using the hardware resources in the class of hardware resources is automatically determined. A graphical user interface is also provided that allows a user to view and modify the assignment information.
摘要:
Disclosed are methods and systems for implementing constraint and connectivity aware physical designs. The method or system provides a connectivity-aware environment to implement electronic designs. For example, the method interactively determines whether an electronic design complies with various constraints by using connectivity information in a nearly real-time manner while the electronic design is being created in some embodiments. The method or system uses the connectivity information provided by a connectivity engine or specified by designers to present feedback to a user as to whether a newly created object or a newly modified object complies or violates certain relevant constraints in an interactive manner or in nearly real-time without having to perform such constraints checking in batch mode. The method further enables one to implement electronic designs by using connectivity information without performing extraction on layouts or rebuilding nets.
摘要:
A hair styling and drying apparatus has a pair of pivotally connected arms, styling surfaces on the arms, air suction and discharge orifices in the styling surfaces, and a blower for blowing air through the air orifices and recycling air between the arms. At least some suction orifices of one styling surface can align with at least some discharge orifices of the other styling surface. The blowers blow air out the discharge orifices and suck air into the suction orifices, thereby recycling much of the blown air. The apparatus can include heaters for heating the blown air and for heating the styling surfaces.
摘要:
Disclosed herein are representative embodiments of methods and apparatus for managing and allocating hardware resources during RTL synthesis. For example, in one exemplary method disclosed herein, an RTL description of a circuit to be implemented in a target architecture is received. The target architecture of this embodiment comprises a fixed number of hardware resources in a class of hardware resources. One or more operator instances are determined from the RTL description received, where at least some of the operator instances are implementable by the hardware resources in the class of hardware resources. In this embodiment, and prior to initially synthesizing the RTL description into a gate-level netlist, assignment information indicative of how the operator instances are to be implemented using the hardware resources in the class of hardware resources is automatically determined. A graphical user interface is also provided that allows a user to view and modify the assignment information.
摘要:
A broad-spectrum harmonic filter is developed. This filter is to be connected in series ahead of the load which generates harmonics. This filter basically consists of 3 fixed elements, i.e. a series reactor and a shunt reactor in series with a capacitor. It can function to completely filter out 5th harmonic current in 3 phase systems (or 3rd harmonic current in single phase systems) and to reduce other harmonic components by high percentages say, typically close to 70%. Thus the portions of various harmonics flowing toward the electrical power source can be held within acceptable limits.
摘要:
Disclosed herein are representative embodiments of methods and apparatus for managing and allocating hardware resources during RTL synthesis. For example, in one exemplary method disclosed herein, an RTL description of a circuit to be implemented in a target architecture is received. The target architecture of this embodiment comprises a fixed number of hardware resources in a class of hardware resources. One or more operator instances are determined from the RTL description received, where at least some of the operator instances are implementable by the hardware resources in the class of hardware resources. In this embodiment, and prior to initially synthesizing the RTL description into a gate-level netlist, assignment information indicative of how the operator instances are to be implemented using the hardware resources in the class of hardware resources is automatically determined. A graphical user interface is also provided that allows a user to view and modify the assignment information.