摘要:
According to some embodiments, a method and apparatus are provided to vary a clock signal frequency for a first time period between a lower limit of a range of problematic frequencies and a frequency lower than the lower limit, and vary the clock signal frequency for a second period of time between an upper limit of the range of problematic frequencies and a frequency greater than the upper limit.
摘要:
Briefly, in accordance with one embodiment, a circuit to encode binary digital signals so as to reduce EMI emissions during signal transmission across a bus or interconnect includes circuitry to apply a pseudo-random pattern of binary digital signals to encode selected binary digital signals so as to reduce the harmonic content of the selected binary digital signals.Briefly, in accordance with another embodiment, a method of encoding binary digital signals so as to reduce EMI emissions during signal transmission across a bus or interconnect includes applying a pseudo-random pattern of binary digital signals to encode selected binary digital signals so as to reduce the harmonic content of the selected binary digital signals.
摘要:
An integrated circuit (IC) includes a package-integrated Faraday cage assembly to reduce the level of electromagnetic radiation emanating from the IC during operation. The IC uses a number of appropriately spaced leads on the IC package to form part of a Faraday cage surrounding a semiconductor chip within the IC. In one approach, the selected leads are coupled by a conductive member to a conductive cover plate of the IC package that forms an upper boundary of the Faraday cage. When the IC is installed in an external circuit, some or all of the selected leads are coupled together outside of the IC package (e.g., to an electrical ground) to form the lower boundary of the Faraday cage.