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公开(公告)号：US20130335151A1
公开(公告)日：2013-12-19
申请号：US13994552
申请日：2012-03-30
申请人： Gerhard Schrom , William Dawson Kesling , Alexander Lalexan Lyakhov , Maynard C. Falconer , Harry G. Skinner
发明人： Gerhard Schrom , William Dawson Kesling , Alexander Lalexan Lyakhov , Maynard C. Falconer , Harry G. Skinner
IPC分类号： H03L7/00
摘要： According to some embodiments, a method and apparatus are provided to vary a clock signal frequency for a first time period between a lower limit of a range of problematic frequencies and a frequency lower than the lower limit, and vary the clock signal frequency for a second period of time between an upper limit of the range of problematic frequencies and a frequency greater than the upper limit.
摘要翻译： 根据一些实施例，提供了一种方法和装置，用于在有问题频率的范围的下限和低于下限的频率之间的第一时间段内改变时钟信号频率，并且将时钟信号频率改变为第二时间 在有问题的频率的范围的上限和大于上限的频率之间的时间段。
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公开(公告)号：US08975975B2
公开(公告)日：2015-03-10
申请号：US13994552
申请日：2012-03-30
申请人： Gerhard Schrom , William Dawson Kesling , Alexander Lalexan Lyakhov , Maynard C. Falconer , Harry G. Skinner
发明人： Gerhard Schrom , William Dawson Kesling , Alexander Lalexan Lyakhov , Maynard C. Falconer , Harry G. Skinner
摘要： According to some embodiments, a method and apparatus are provided to vary a clock signal frequency for a first time period between a lower limit of a range of problematic frequencies and a frequency lower than the lower limit, and vary the clock signal frequency for a second period of time between an upper limit of the range of problematic frequencies and a frequency greater than the upper limit.
摘要翻译： 根据一些实施例，提供了一种方法和装置，用于在有问题频率的范围的下限和低于下限的频率之间的第一时间段内改变时钟信号频率，并且将时钟信号频率改变为第二时间 在有问题的频率的范围的上限和大于上限的频率之间的时间段。
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公开(公告)号：US20140016679A1
公开(公告)日：2014-01-16
申请号：US13993271
申请日：2011-12-30
IPC分类号： H04B1/7097
CPC分类号： H04B1/7097 , H04B15/04
摘要： An apparatus, system, and method, the method including receiving clock frequency parameter information for at least one clock source; receiving radio parameter information for at least one radio receiver; determining one or more spread spectrum clocking (SSC) profiles for the at least one clock source and the at least one radio receiver, each SSC profile to reduce radio frequency interference between the clock and radio receivers; and storing the SSC profiles.
摘要翻译： 一种装置，系统和方法，所述方法包括：接收至少一个时钟源的时钟频率参数信息; 接收至少一个无线电接收机的无线电参数信息; 确定所述至少一个时钟源和所述至少一个无线电接收机的一个或多个扩频时钟（SSC）简档，每个SSC简档以减少所述时钟和无线电接收机之间的射频干扰; 并存储SSC配置文件。
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公开(公告)号：US09270326B2
公开(公告)日：2016-02-23
申请号：US13993271
申请日：2011-12-30
IPC分类号： H04B1/00 , H04B1/7097 , H04B15/04
CPC分类号： H04B1/7097 , H04B15/04
摘要： An apparatus, system, and method, the method including receiving clock frequency parameter information for at least one clock source; receiving radio parameter information for at least one radio receiver; determining one or more spread spectrum clocking (SSC) profiles for the at least one clock source and the at least one radio receiver, each SSC profile to reduce radio frequency interference between the clock and radio receivers; and storing the SSC profiles.
摘要翻译： 一种装置，系统和方法，所述方法包括：接收至少一个时钟源的时钟频率参数信息; 接收至少一个无线电接收机的无线电参数信息; 确定所述至少一个时钟源和所述至少一个无线电接收机的一个或多个扩频时钟（SSC）简档，每个SSC简档以减少所述时钟和无线电接收机之间的射频干扰; 并存储SSC配置文件。
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公开(公告)号：US09448956B2
公开(公告)日：2016-09-20
申请号：US13995804
申请日：2012-03-30
CPC分类号： G06F13/28 , G06F13/4243
摘要： According to some embodiments, a method and apparatus are provided to receive a first data burst associated with a first data line and a second data burst associated with a second data line, determine a first one or more stuff bits to be transmitted after the first data burst and a second one or more stuff bits to be transmitted after the second data burst, and output data comprising the first data burst and the first one or more stuff bits and the second data burst and the second one or more stuff bits.
摘要翻译： 根据一些实施例，提供了一种方法和装置，用于接收与第一数据线相关联的第一数据脉冲串和与第二数据线相关联的第二数据脉冲串，确定在第一数据之后要发送的第一个或多个填充位 以及在第二数据脉冲串之后要发送的第二个或多个填充位，并且输出包括第一数据突发和第一个一个或多个填充位以及第二数据突发和第二个一个或多个填充位的数据。
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公开(公告)号：US07315186B2
公开(公告)日：2008-01-01
申请号：US11145749
申请日：2005-06-06
IPC分类号： H03K19/094 , H03K19/0175
CPC分类号： H04L25/0276 , H04L25/03878
摘要： An equalized driver includes a voltage mode driver to drive data on a conductor and a current mode driver to provide equalization.
摘要翻译： 均衡驱动器包括用于驱动导体上的数据的电压模式驱动器和电流模式驱动器以提供均衡。
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公开(公告)号：US20150178237A1
公开(公告)日：2015-06-25
申请号：US14140386
申请日：2013-12-24
IPC分类号： G06F13/40 , H04L1/20 , H03K19/003
CPC分类号： G06F13/4086 , H03K19/00346 , H04L1/20 , Y02D10/14 , Y02D10/151
摘要： Techniques for reducing the spectral content of a data bus are described herein. An example of a device in accordance with the present techniques includes logic to obtain a present bit of data to be transmitted over a data bus and estimate a spectral energy contribution of the present bit at a frequency of interest. The device also includes logic to determine what effect inverting the present bit will have on a net spectral energy of the data bus at the frequency of interest when the present bit is transmitted over the data bus. The device also includes logic to invert the present bit to generate an inverted bit and transmit the inverted bit over the data bus if inverting the present bit reduces the net spectral energy of the data bus at the frequency of interest.
摘要翻译： 本文描述了用于降低数据总线的频谱内容的技术。 根据本技术的设备的示例包括获得要在数据总线上传输的数据的当前位并且以感兴趣的频率估计当前位的频谱能量贡献的逻辑。 当当前位通过数据总线发送时，该装置还包括确定当前位将反转当前位置在数据总线的净频谱能量上的效果的逻辑。 该器件还包括用于反转当前位以产生反相位的逻辑，并且通过数据总线发送反相位，如果反相当前位以感兴趣的频率降低数据总线的净频谱能量。
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公开(公告)号：US20140156902A1
公开(公告)日：2014-06-05
申请号：US13995804
申请日：2012-03-30
IPC分类号： G06F13/28
CPC分类号： G06F13/28 , G06F13/4243
摘要： According to some embodiments, a method and apparatus are provided to receive a first data burst associated with a first data line and a second data burst associated with a second data line, determine a first one or more stuff bits to be transmitted after the first data burst and a second one or more stuff bits to be transmitted after the second data burst, and output data comprising the first data burst and the first one or more stuff bits and the second data burst and the second one or more stuff bits.
摘要翻译： 根据一些实施例，提供了一种方法和装置，用于接收与第一数据线相关联的第一数据脉冲串和与第二数据线相关联的第二数据脉冲串，确定在第一数据之后要发送的第一个或多个填充位 以及在第二数据脉冲串之后要发送的第二个或多个填充位，并且输出包括第一数据突发和第一个一个或多个填充位以及第二数据突发和第二个一个或多个填充位的数据。
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公开(公告)号：US20150188736A1
公开(公告)日：2015-07-02
申请号：US14140588
申请日：2013-12-26
IPC分类号： H04L25/08
CPC分类号： H04L25/08
摘要： A computing device can include a radio receiver to receive a radio signal from a radio transmitter of a second computing or communication device. The radio receiver can experience radio frequency interference. The computing device can also include a digital signal generator. The digital signal generator can be to process a signal (S1) underlying a source of the radio frequency interference. The digital signal generator can also be to generate a digital signal (S1). The digital signal generator can further be to inject the digital signal (S1) into the radio receiver to cancel the radio frequency interference around the radio frequency of interest.
摘要翻译： 计算设备可以包括无线电接收机，用于从第二计算或通信设备的无线电发射机接收无线电信号。 无线电接收机可能会遇到射频干扰。 计算设备还可以包括数字信号发生器。 数字信号发生器可以处理基于射频干扰源的信号（S1）。 数字信号发生器也可以产生数字信号（S1）。 数字信号发生器还可以将数字信号（S1）注入到无线电接收机中以消除感兴趣的射频周围的射频干扰。
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10.发明申请UNIDIRECTIONAL CODING FOR BIDIRECTIONAL DATA BUS RADIO FREQUENCY INTERFERENCE MITIGATION 有权双向数据总线无线电频率干扰减速的单独编码公开(公告)号：US20150180679A1
公开(公告)日：2015-06-25
申请号：US14139807
申请日：2013-12-23
CPC分类号： H04L12/40032 , H04B1/12 , H04L1/0011 , H04L25/08
摘要： An integrated circuit chip can include an interference mitigator. The interference mitigator can be to modify encoding to generate a cancellation pattern for optimum cancellation of radio frequency interference (RFI) at the effective mid-point of the data bus. The interference mitigator can also be to transmit the generated cancellation pattern across the data bus to cancel the radio frequency interference.
摘要翻译： 集成电路芯片可以包括干扰减轻器。 干扰减轻器可以是修改编码以产生用于在数据总线的有效中点处的射频干扰（RFI）的最佳消除的消除模式。 干扰减轻器也可以是通过数据总线发送所生成的消除模式以消除射频干扰。
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