公开(公告)号：US07535771B2

公开(公告)日：2009-05-19

申请号：US11096878

申请日：2005-04-01

Applicant: Wen-Yi Hsieh ,  Ching-Chung Lin ,  Ken-Hui Chen ,  Chun-Hsiung Hung

Inventor： Wen-Yi Hsieh ,  Ching-Chung Lin ,  Ken-Hui Chen ,  Chun-Hsiung Hung

IPC: G11C16/04

CPC classification number: G11C16/0475 ,  G11C16/04 ,  G11C16/3445 ,  G11C29/50 ,  G11C29/50004 ,  G11C29/52

Abstract: A NROM memory device includes an array of memory cells and first and second bit lines. The first and second bit lines are coupled to opposite sides of the memory cells. During an erase operation, one of the sides of the memory cells receives a positive voltage and the other side couples to a common node or a limited current source. Methods are also disclosed that can easily screen for marginal memory cells based on a threshold voltage distribution of the memory cells.

Abstract translation: NROM存储器件包括存储器单元阵列和第一和第二位线。 第一和第二位线耦合到存储器单元的相对侧。 在擦除操作期间，存储器单元的一侧接收正电压，另一侧耦合到公共节点或有限电流源。 还公开了可以基于存储器单元的阈值电压分布容易地筛选边际存储器单元的方法。

公开(公告)号：US20090116264A1

公开(公告)日：2009-05-07

申请号：US12291208

申请日：2008-11-07

Applicant: Ching-Chung Lin

Inventor： Ching-Chung Lin

IPC: H02M3/335 ,  H02M7/00

CPC classification number: H02M3/33569 ,  H02M3/33561 ,  H02M2003/1586

Abstract: An exemplary power supply circuit (20) includes an input terminal (201), an output terminal (202), voltage converting circuits (23, 24), and a pulse width modulation circuit (22). The input terminal is capable of receiving a direct current voltage. The output terminal is capable of providing voltage to a load circuit. The voltage converting circuits are connected in parallel between the input terminal and the output terminal. The pulse width modulation circuit is configured to control the voltage converting circuits to convert the direct current voltage into pulse voltages. A phase of each pulse voltage is delayed relative to that of an adjacent preceding pulse voltage.

Abstract translation: 示例性电源电路（20）包括输入端（201），输出端（202），电压转换电路（23,24）和脉宽调制电路（22）。 输入端子能够接收直流电压。 输出端子能够向负载电路提供电压。 电压转换电路在输入端子和输出端子之间并联连接。 脉宽调制电路被配置为控制电压转换电路将直流电压转换为脉冲电压。 每个脉冲电压的相位相对于相邻的先前脉冲电压的相位延迟。

公开(公告)号：US20070014157A1

公开(公告)日：2007-01-18

申请号：US11181983

申请日：2005-07-15

Applicant: Chun-Hsiung Hung ,  Chuan-Ying Yu ,  Han-Sung Chen ,  Nai-Ping Kuo ,  Ching-Chung Lin ,  Kuen-Long Chang

Inventor： Chun-Hsiung Hung ,  Chuan-Ying Yu ,  Han-Sung Chen ,  Nai-Ping Kuo ,  Ching-Chung Lin ,  Kuen-Long Chang

IPC: G11C16/04 ,  G11C11/34

CPC classification number: G11C16/24

Abstract: A memory cell array, such as an EEPROM flash memory array, includes a current limiting circuit that limits a sum of leakage currents from nonselected memory cells during operation of the array, such as during a programming operation.

Abstract translation: 诸如EEPROM闪速存储器阵列的存储单元阵列包括电流限制电路，例如在编程操作期间限制阵列操作期间来自非选择存储单元的漏电流之和。