公开(公告)号：US08300371B2

公开(公告)日：2012-10-30

申请号：US12763152

申请日：2010-04-19

Applicant: Xian-Jun Su ,  Ching-Chung Lin

Inventor： Xian-Jun Su ,  Ching-Chung Lin

IPC: H02H9/00

CPC classification number: G02F1/136204

Abstract: An electrostatic discharge protection circuit includes an input terminal, a first diode, a second diode, a third diode, a fourth diode, a plurality of voltage stabilizer circuits, and a power terminal. The input terminal and the cathode of the second diode connect to the anode of the first diode; the voltage stabilizer circuits connect in parallel between the cathode of the first diode and the anode of the second diode. The power terminal connects to the anode of the third diode, the cathode of the third diode connects to the cathode of the first diode. The cathode of the fourth diode connects to ground, the anode of the fourth diode connects to the anode of the second diode.

Abstract translation: 静电放电保护电路包括输入端子，第一二极管，第二二极管，第三二极管，第四二极管，多个稳压电路和电源端子。 第二二极管的输入端子和阴极连接到第一二极管的阳极; 电压稳定器电路并联连接在第一二极管的阴极和第二二极管的阳极之间。 电源端子连接到第三个二极管的阳极，第三个二极管的阴极连接到第一个二极管的阴极。 第四二极管的阴极连接到地，第四二极管的阳极连接到第二二极管的阳极。

公开(公告)号：US08094493B2

公开(公告)日：2012-01-10

申请号：US11271300

申请日：2005-11-10

Applicant: Wen-Yi Hsieh ,  Ken-Hui Chen ,  Chun-Hsiung Hung ,  Han-Sung Chen ,  Nai-Ping Kuo ,  Ching-Chung Lin ,  Chuan-Ying Yu

Inventor： Wen-Yi Hsieh ,  Ken-Hui Chen ,  Chun-Hsiung Hung ,  Han-Sung Chen ,  Nai-Ping Kuo ,  Ching-Chung Lin ,  Chuan-Ying Yu

IPC: G11C11/34 ,  G11C7/02

CPC classification number: G11C16/28 ,  G11C16/04 ,  G11C16/0475 ,  G11C29/028 ,  G11C29/24 ,  G11C29/50004 ,  G11C2211/5634

Abstract: A memory device is disclosed that includes a plurality of word lines and a plurality of memory cells operating in one of a plurality of modes and coupled to at least one of the word lines. The memory device also includes a plurality of reference lines and reference cells. Each reference cell corresponds to one of the operating modes, supplies a reference current for the corresponding mode, and is coupled to at least one of the reference lines. A reference cell current from a reference cell can also be compared to a target range and, if outside the target range, the voltage level on a corresponding reference line can be adjusted accordingly such that the reference current falls within the target range (i.e., reference current trimming).

Abstract translation: 公开了一种存储器件，其包括多个字线和以多个模式之一工作并耦合到至少一个字线的多个存储单元。 存储装置还包括多个参考线和参考单元。 每个参考单元对应于一个操作模式，为相应模式提供参考电流，并耦合到至少一个参考线。 来自参考单元的参考单元电流也可以与目标范围进行比较，并且如果在目标范围之外，可以相应地调整相应参考线上的电压电平，使得参考电流落在目标范围内（即，参考 当前修剪）。

公开(公告)号：US07781911B2

公开(公告)日：2010-08-24

申请号：US12231503

申请日：2008-09-02

Applicant: Ching-Chung Lin

Inventor： Ching-Chung Lin

IPC: H02J1/10

CPC classification number: H02M3/33523 ,  Y10T307/406 ,  Y10T307/505

Abstract: An power supply circuit includes at least one voltage converting circuit, a plurality of output branches, and a plurality of power assigning elements. The at least one voltage converting circuit is configured for converting a primary voltage signal to at least one alternating current (AC) voltage signal. Each of the output branches is configured for providing a direct current (DC) power supply to a respective load circuit based on the at least one AC voltage signal. The power assigning elements are configured to reassign the DC power supplies provided by the output branches to the load circuits.

Abstract translation: 电源电路包括至少一个电压转换电路，多个输出分支和多个功率分配元件。 所述至少一个电压转换电路被配置为将初级电压信号转换成至少一个交流（AC）电压信号。 每个输出分支被配置为基于至少一个AC电压信号向相应的负载电路提供直流（DC）电源。 功率分配元件被配置为将由输出分支提供的直流电源重新分配给负载电路。

公开(公告)号：US20090251205A1

公开(公告)日：2009-10-08

申请号：US12384442

申请日：2009-04-03

Applicant: Ching-Chung Lin

Inventor： Ching-Chung Lin

IPC: G05F1/10

CPC classification number: G06F1/3203 ,  G06F1/3265 ,  G06F1/3287 ,  Y02D10/153 ,  Y02D10/171 ,  Y02D50/20

Abstract: A power supply circuit includes a voltage output controller configured for outputting voltages, a standby controller configured for directing the voltage output controller to provide voltage to a load, and a microprocessor configured for controlling the standby controller according to a mode of the load. The voltage output controller is applied with a direct current voltage. When the load enters active mode from a powered off mode, the standby controller sends a control signal to the voltage output controller to output direct current voltage to the load and the microprocessor. When the load enters standby mode from the active mode, the microprocessor directs the standby controller to prevent the voltage output controller from outputting direct current voltage to the load and the microprocessor.

Abstract translation: 电源电路包括被配置为输出电压的电压输出控制器，被配置为用于引导电压输出控制器向负载提供电压的备用控制器，以及被配置为根据负载模式控制备用控制器的微处理器。 电压输出控制器采用直流电压。 当负载从电源关闭模式进入主动模式时，待机控制器向电压输出控制器发送控制信号，以将负载和微处理器的直流电压输出。 当负载从主动模式进入待机模式时，微处理器指示备用控制器，以防止电压输出控制器向负载和微处理器输出直流电压。

公开(公告)号：US20060092709A1

公开(公告)日：2006-05-04

申请号：US11096878

申请日：2005-04-01

Applicant: Wen-Yi Hsieh ,  Ching-Chung Lin ,  Ken-Hui Chen ,  Chun-Hsiung Hung

Inventor： Wen-Yi Hsieh ,  Ching-Chung Lin ,  Ken-Hui Chen ,  Chun-Hsiung Hung

IPC: G11C16/04

CPC classification number: G11C16/0475 ,  G11C16/04 ,  G11C16/3445 ,  G11C29/50 ,  G11C29/50004 ,  G11C29/52

Abstract: A NROM memory device includes an array of memory cells and first and second bit lines. The first and second bit lines are coupled to opposite sides of the memory cells. During an erase operation, one of the sides of the memory cells receives a positive voltage and the other side couples to a common node or a limited current source. Methods are also disclosed that can easily screen for marginal memory cells based on a threshold voltage distribution of the memory cells.

公开(公告)号：US06984716B2

公开(公告)日：2006-01-10

申请号：US10394250

申请日：2003-03-24

Applicant: Kuen-Yuan Hwang ,  An-Pang Tu ,  Chi-Yi Ju ,  Ching-Chung Lin

Inventor： Kuen-Yuan Hwang ,  An-Pang Tu ,  Chi-Yi Ju ,  Ching-Chung Lin

IPC: C08G79/02

CPC classification number: C08G79/04 ,  C08G2650/34 ,  H05K1/0326

Abstract: A phosphorus-containing compound represented by formula (I) and a preparation method thereof are provided. An addition reaction is performed for an organic cyclic phosphorus compound with an aryl aldehyde compound, and then a condensation reaction is performed with an aryl compound having active hydrogen in the use of an organic acid as a catalyst to obtain the proposed phosphorus-containing compound. This phosphorus-containing compound can be used as a hardener for resin, and improves flame retardant properties and thermal resistance for a flame retardant epoxy resin composition, thereby suitably applied to resin compositions used for manufacturing printed circuit boards and laminated circuit boards in electronic or electric products.

Abstract translation: 提供由式（I）表示的含磷化合物及其制备方法。 对具有芳基醛化合物的有机环状磷化合物进行加成反应，然后在使用有机酸作为催化剂的情况下，用具有活性氢的芳基化合物进行缩合反应，得到所提出的含磷化合物。 该含磷化合物可以用作树脂的固化剂，并且改善阻燃环氧树脂组合物的阻燃性和耐热性，从而适用于用于制造印刷电路板和用于电子或电气的层叠电路板的树脂组合物 产品。

公开(公告)号：US08174904B2

公开(公告)日：2012-05-08

申请号：US12898691

申请日：2010-10-05

Applicant: Wen-Yi Hsieh ,  Ching-Chung Lin ,  Ken-Hui Chen ,  Chun-Hsiung Hung

Inventor： Wen-Yi Hsieh ,  Ching-Chung Lin ,  Ken-Hui Chen ,  Chun-Hsiung Hung

IPC: G11C11/34 ,  G11C16/04

CPC classification number: G11C16/0475 ,  G11C16/04 ,  G11C16/3445 ,  G11C29/50 ,  G11C29/50004 ,  G11C29/52

Abstract: An embodiment of the invention provides a memory array including a plurality of bit lines, a plurality of memory cells and a device. Each of the plurality of memory cells has a first node, a second node and a third node, wherein the third node is coupled to one of the plurality of bit lines. The device couples the plurality of bit lines together to form a common node for one of the plurality of memory cells.

Abstract translation: 本发明的一个实施例提供一种包括多个位线，多个存储单元和一个设备的存储器阵列。 多个存储单元中的每一个具有第一节点，第二节点和第三节点，其中第三节点耦合到多个位线之一。 该设备将多个位线耦合在一起以形成多个存储器单元之一的公共节点。

公开(公告)号：US08085016B2

公开(公告)日：2011-12-27

申请号：US12384442

申请日：2009-04-03

Applicant: Ching-Chung Lin

Inventor： Ching-Chung Lin

IPC: G05F1/00

CPC classification number: G06F1/3203 ,  G06F1/3265 ,  G06F1/3287 ,  Y02D10/153 ,  Y02D10/171 ,  Y02D50/20

Abstract: A power supply circuit includes a voltage output controller configured for outputting voltages, a standby controller configured for directing the voltage output controller to provide voltage to a load, and a microprocessor configured for controlling the standby controller according to a mode of the load. The voltage output controller is applied with a direct current voltage. When the load enters active mode from a powered off mode, the standby controller sends a control signal to the voltage output controller to output direct current voltage to the load and the microprocessor. When the load enters standby mode from the active mode, the microprocessor directs the standby controller to prevent the voltage output controller from outputting direct current voltage to the load and the microprocessor.

Abstract translation: 电源电路包括被配置为输出电压的电压输出控制器，被配置为用于引导电压输出控制器向负载提供电压的备用控制器，以及被配置为根据负载模式控制备用控制器的微处理器。 电压输出控制器采用直流电压。 当负载从电源关闭模式进入主动模式时，待机控制器向电压输出控制器发送控制信号，以将负载和微处理器的直流电压输出。 当负载从主动模式进入待机模式时，微处理器指示备用控制器，以防止电压输出控制器向负载和微处理器输出直流电压。

公开(公告)号：US20090287946A1

公开(公告)日：2009-11-19

申请号：US12454453

申请日：2009-05-18

Applicant: Ching-Chung Lin

Inventor： Ching-Chung Lin

IPC: G06F1/32 ,  G06F1/00

CPC classification number: H02J9/005 ,  G06F1/3203 ,  G06F1/3265 ,  Y02D10/153

Abstract: A power supply control circuit includes a standby control circuit, a microprocessor, and a power supply main circuit. The standby control circuit generates a pulse signal, outputs a first control signal, and sets the first control signal to an active state upon actuation of the switch member. The microprocessor outputs and sets a second control signal to first and second states upon first and second generations of the pulse signal, respectively. The standby control circuit maintains the first control signal at the active state when the second control signal is set to the first state, and sets the first control signal to an inactive state when the second control signal is set to the second state. The power supply main circuit outputs a power when the first control signal is set to the active state, and cuts off the power when the first control signal is set to the inactive state.

Abstract translation: 电源控制电路包括备用控制电路，微处理器和电源主电路。 备用控制电路产生脉冲信号，输出第一控制信号，并且在开关构件致动时将第一控制信号设置为活动状态。 微处理器分别在脉冲信号的第一代和第二代输出并将第二控制信号设置为第一和第二状态。 当第二控制信号被设置为第一状态时，备用控制电路将第一控制信号保持在激活状态，并且当第二控制信号被设置为第二状态时，将第一控制信号设置为无效状态。 当第一控制信号被设置为有效状态时，电源主电路输出电力，并且当第一控制信号被设置为非活动状态时，电源主电路输出电力。

公开(公告)号：US07397717B2

公开(公告)日：2008-07-08

申请号：US11137503

申请日：2005-05-26

Applicant: Han-Sung Chen ,  Chia-Yen Yeh ,  Chen-Hao Po ,  Ching-Chung Lin

Inventor： Han-Sung Chen ,  Chia-Yen Yeh ,  Chen-Hao Po ,  Ching-Chung Lin

IPC: G11C7/10

CPC classification number: G11C7/1075 ,  G11C5/066

Abstract: A serial peripheral flash memory device uses a plurality of dummy input/output terminals to enable the selection of a parallel mode for devices that have a slower serial clock speed. In parallel mode, data is transmitted over the plurality of dummy input/output terminals to allow a plurality of bits to be transmitted at the same time improving the data transmission rate at the slower serial clock speed.

Abstract translation: 串行外围闪存器件使用多个虚拟输入/输出端子，以便能够对具有较慢串行时钟速度的器件选择并行模式。 在并行模式下，通过多个虚拟输入/输出端子发送数据，以允许同时发送多个位，以较慢的串行时钟速度提高数据传输速率。