公开(公告)号：US20230251427A1

公开(公告)日：2023-08-10

申请号：US17650601

申请日：2022-02-10

Applicant: Cisco Technology, Inc.

Inventor： Norbert SCHLEPPLE ,  Vipulkumar K. PATEL ,  Weizhuo LI

IPC: G02B6/30

CPC classification number: G02B6/30

Abstract: An apparatus includes a ribbon, an optical waveguide, and an IC. The ribbon includes a first end. The optical waveguide is disposed within the ribbon and terminates at the first end. The IC includes a curved surface. The first end of the ribbon bends to mate with the curved surface such that the optical waveguide is optically coupled to a corresponding waveguide in the IC.

公开(公告)号：US20230204987A1

公开(公告)日：2023-06-29

申请号：US18177497

申请日：2023-03-02

Applicant: Cisco Technology, Inc.

Inventor： Xunyuan ZHANG ,  Vipulkumar K. PATEL ,  Prakash B. GOTHOSKAR ,  Ming Gai Stanley LO

IPC: G02F1/025

CPC classification number: G02F1/025 ,  G02F2202/104 ,  G02F2202/105

Abstract: Embodiments provide for an optical modulator, comprising: a lower guide, comprising: a lower hub, made of monocrystalline silicon; and a lower ridge, made of monocrystalline silicon that extends in a first direction from the lower hub; an upper guide, including: an upper hub; and an upper ridge, made of monocrystalline silicon that extends in a second direction, opposite of the first direction, from the upper hub and is aligned with the lower ridge; and a gate oxide layer separating the lower ridge from the upper ridge and defining a waveguide region with the lower guide and the upper guide.

公开(公告)号：US20220397727A1

公开(公告)日：2022-12-15

申请号：US17303853

申请日：2021-06-09

Applicant: Cisco Technology, Inc.

Inventor： Norbert SCHLEPPLE ,  Vipulkumar K. PATEL ,  Anthony D. KOPINETZ

IPC: G02B6/42

Abstract: Aspects described herein include an apparatus supporting optical alignment with one or more optical waveguides optically exposed along an edge of a photonic integrated circuit (IC). The apparatus comprises a frame body comprising an upper portion defining a reference surface, and a lateral portion defining an interface for an optical connector connected with one or more optical fibers. The lateral portion comprises one or more optical components defining an optical path through the lateral portion. The one or more optical components are arranged relative to the reference surface such that the one or more optical components align with (i) the one or more optical waveguides along at least one dimension when the reference surface contacts a top surface of an anchor IC, and with (ii) the one or more optical fibers when the optical connector is connected at the interface.

公开(公告)号：US20220196933A1

公开(公告)日：2022-06-23

申请号：US17133407

申请日：2020-12-23

Applicant: Cisco Technology, Inc.

Inventor： Vipulkumar K. PATEL ,  Paul TON ,  Aparna R. PRASAD ,  Norbert SCHLEPPLE

IPC: G02B6/42

Abstract: Aspects described herein include an apparatus comprising a substrate, an electronic integrated circuit (IC) disposed on the substrate, one or more optical ICs disposed on the substrate and communicatively coupled with the electronic IC, and a stiffener device attached to the substrate. The stiffener device comprises a stiffener ring that substantially circumscribes the one or more optical ICs. The stiffener device defines one or more features configured to receive a plurality of light-carrying media that optically couple with the one or more optical ICs and that extend to one or more lateral edges of the stiffener device.

公开(公告)号：US20210359490A1

公开(公告)日：2021-11-18

申请号：US17444202

申请日：2021-08-02

Applicant: Cisco Technology, Inc.

Inventor： Jock T. BOVINGTON ,  Vipulkumar K. PATEL ,  Dominic F. SIRIANI

IPC: H01S5/02 ,  H01S5/042 ,  H01S5/343 ,  H01S5/40 ,  H01S5/34

Abstract: A laser integrated photonic platform to allow for independent fabrication and development of laser systems in silicon photonics. The photonic platform includes a silicon substrate with an upper surface, one or more through silicon vias (TSVs) defined through the silicon substrate, and passive alignment features in the substrate. The photonic platform includes a silicon substrate wafer with through silicon vias (TSVs) defined through the silicon substrate, and passive alignment features in the substrate for mating the photonic platform to a photonics integrated circuit. The photonic platform also includes a III-V semiconductor material structure wafer, where the III-V wafer is bonded to the upper surface of the silicon substrate and includes at least one active layer forming a light source for the photonic platform.

公开(公告)号：US20210328409A1

公开(公告)日：2021-10-21

申请号：US16853457

申请日：2020-04-20

Applicant: Cisco Technology, Inc.

Inventor： Dominic F. SIRIANI ,  Vipulkumar K. PATEL

IPC: H01S5/34 ,  H01S5/10 ,  H01S5/12 ,  H01S5/028 ,  H01S5/042

Abstract: A quantum dot comb laser, is provided that comprises a first waveguide having a first width; and a second waveguide running above the first waveguide that includes: a quantum dot layer; a first region of a second width less than the first width; a second region connected to the first region and comprising a reflective grating; and a third region connected at a first end to the second region and at a second end to an output surface wherein the third region tapers from the second width at the first end to a third width, less than the second width, at the second end.

公开(公告)号：US20210278589A1

公开(公告)日：2021-09-09

申请号：US16809446

申请日：2020-03-04

Applicant: Cisco Technology, Inc.

Inventor： Vipulkumar K. PATEL ,  Mark A. WEBSTER ,  Craig S. APPEL

IPC: G02B6/122 ,  G02B6/30

Abstract: Embodiments herein describe providing a decoupling capacitor on a first wafer (or substrate) that is then bonded to a second wafer to form an integrated decoupling capacitor. Using wafer bonding means that the decoupling capacitor can be added to the second wafer without having to take up space in the second wafer. In one embodiment, after bonding the first and second wafers, one or more vias are formed through the second wafer to establish an electrical connection between the decoupling capacitor and bond pads on a first surface of the second wafer. An electrical IC can then be flip chipped bonded to the first surface. As part of coupling the decoupling capacitor to the electrical IC, the decoupling capacitor is connected between the rails of a power source (e.g., VDD and VSS) that provides power to the electrical IC.

公开(公告)号：US20210265806A1

公开(公告)日：2021-08-26

申请号：US17302099

申请日：2021-04-23

Applicant: Cisco Technology, Inc.

Inventor： Dominic F. SIRIANI ,  Jock T. BOVINGTON ,  Vipulkumar K. PATEL

IPC: H01S5/026 ,  G02B6/122 ,  H01S5/343 ,  G02B6/136 ,  H01S5/10 ,  G02B6/13 ,  H01S5/028 ,  H01S5/02

Abstract: Embodiments provide for selective-area growth of III-V materials for integration with silicon photonics. The resulting platform includes a substrate; an insulator, extending a first distance from the substrate, including a passive optical component at a second distance from the substrate less than the first distance, and defining a pit extending to the substrate; and a III-V component, extending from the substrate within in the pit defined in the insulator, the III-V component including a gain medium included at the second distance from the substrate and optically coupled with the passive optical component. The pit may define an Optical Coupling Interface between the III-V component and the passive optical component, or a slit defined between the III-V component and the passive optical component may define the Optical Coupling Interface.

公开(公告)号：US20210157068A1

公开(公告)日：2021-05-27

申请号：US16698458

申请日：2019-11-27

Applicant: Cisco Technology, Inc.

Inventor： Prakash B. GOTHOSKAR ,  Vipulkumar K. PATEL ,  Soha NAMNABAT ,  Ravi S. TUMMIDI

IPC: G02B6/42

Abstract: Embodiments described herein include an apparatus comprising a semiconductor-based photodiode disposed on a semiconductor layer, and an optical waveguide spaced apart from the semiconductor layer and evanescently coupled with a depletion region of the photodiode. The photodiode may be arranged as a vertical photodiode or a lateral photodiode.

公开(公告)号：US20210141154A1

公开(公告)日：2021-05-13

申请号：US16677404

申请日：2019-11-07

Applicant: Cisco Technology, Inc.

Inventor： Sandeep RAZDAN ,  Vipulkumar K. PATEL ,  Mark A. WEBSTER ,  Matthew J. TRAVERSO

IPC: G02B6/122 ,  G02B6/30 ,  H01L23/48 ,  H01L23/498 ,  H01L21/48 ,  H01L21/762

Abstract: Aspects described herein include a method comprising bonding a photonic wafer with an electronic wafer to form a wafer assembly, removing a substrate of the wafer assembly to expose a surface of the photonic wafer or of the electronic wafer, forming electrical connections between metal layers of the photonic wafer and metal layers of the electronic wafer, and adding an interposer wafer to the wafer assembly by bonding the interposer wafer with the wafer assembly at the exposed surface. The interposer wafer comprises through-vias that are electrically coupled with the metal layers of one or both of the photonic wafer and the electronic wafer. The method further comprises dicing the wafer assembly to form a plurality of dies. A respective edge coupler of each die is optically exposed at an interface formed by the dicing.