公开(公告)号：US20160189327A1

公开(公告)日：2016-06-30

申请号：US14583300

申请日：2014-12-26

Applicant: Intel Corporation

Inventor： SUBRAMANIAM MAIYURAN ,  SHUBH B. SHAH ,  ASHUTOSH GARG ,  JIN XU ,  THOMAS A. PIAZZA ,  JORGE F. GARCIA PABON ,  MICHAEL K. DWYER

IPC: G06T1/20 ,  G09G5/00 ,  G06T15/80

CPC classification number: G06T1/20 ,  G06F7/00 ,  G06F9/3001 ,  G06F9/3016 ,  G06F9/30181 ,  G06T15/80 ,  G09G5/00 ,  G09G5/001 ,  G09G5/363 ,  G09G2330/021 ,  G09G2360/08

Abstract: Systems and methods may provide a graphics processor that may identify operating conditions under which certain floating point instructions may utilize power to fewer hardware resources compared to when the instructions are executing under other operating conditions. The operating conditions may be determined by examining operands used in a given instruction, including the relative magnitudes of the operands and whether the operands may be taken as equal to certain defined values. The floating point instructions may include instructions for an addition operation, a multiplication operation, a compare operation, and/or a fused multiply-add operation.

Abstract translation: 系统和方法可以提供图形处理器，其可以识别与在其他操作条件下执行指令时相比，某些浮点指令可以利用较少的硬件资源的功率的操作条件。 操作条件可以通过检查给定指令中使用的操作数来确定，包括操作数的相对大小以及操作数是否可以被视为等于某些定义的值。 浮点指令可以包括用于加法运算，乘法运算，比较运算和/或融合乘法运算的指令。

公开(公告)号：US20160179535A1

公开(公告)日：2016-06-23

申请号：US14581858

申请日：2014-12-23

Applicant: INTEL CORPORATION

Inventor： WEI-YU CHEN ,  GUEI-YUAN LUEH ,  SUBRAMANIAM MAIYURAN

IPC: G06F9/30 ,  G06F9/38

CPC classification number: G06F9/30058 ,  G06F9/3005 ,  G06F9/30072 ,  G06F9/30145 ,  G06F9/3017 ,  G06F9/3824 ,  G06F9/3851 ,  G06F9/3887 ,  G06F9/46 ,  G06T1/20

Abstract: An apparatus and method for executing nested control flow instructions on a graphics processing unit (GPU). For example, one embodiment of a processor comprises: an execution unit having a plurality of channels to execute control flow instructions including fused control flow instructions comprising two or more consecutive control flow instructions fused into a single fused control flow instruction; and a branch unit to process the control flow instructions and to maintain a global counter indicating a nesting level of the control flow instructions, wherein to process a fused control flow instruction, the branch unit is to store a value N in a stack indicating a number of control flow instructions fused into the fused control flow instruction, the branch unit to subsequently read the value N from the stack upon execution of the fused control flow instruction and decrement the global counter by a value of N responsive to execution of the fused control flow instruction.

Abstract translation: 一种用于在图形处理单元（GPU）上执行嵌套控制流指令的装置和方法。 例如，处理器的一个实施例包括：具有多个通道以执行控制流程指令的执行单元，其包括融合到单个融合控制流程指令中的包括两个或多个连续控制流程指令的融合控制流程指令; 以及分支单元，用于处理所述控制流程指令并维护指示所述控制流程指令的嵌套级别的全局计数器，其中为了处理融合控制流程指令，所述分支单元将值N存储在指示数字的堆栈中 控制流程指令融合到融合控制流程指令中，分支单元随后在执行融合控制流程指令时随后从堆栈读取值N，并响应于融合控制流程的执行将全局计数器递减N值 指令。

公开(公告)号：US20160139934A1

公开(公告)日：2016-05-19

申请号：US14543027

申请日：2014-11-17

Applicant: Intel Corporation

Inventor： SATYAJIT SARANGI ,  THOMAS F. RAOUX ,  GUEI-YUAN LUEH ,  SUBRAMANIAM MAIYURAN

IPC: G06F9/38 ,  G06F9/30

CPC classification number: G06F9/30032 ,  G06F9/3001 ,  G06F9/30036 ,  G06F9/3004 ,  G06F9/3017

Abstract: Systems and methods may process a single atomic operation. An instruction set may be generated to replace a plurality of atomic operations with a single atomic operation. The instruction set may include an accumulation instruction to compute a prefix sum for a plurality of initial values associated with a plurality of processing lanes to generate a plurality of accumulated values. The instruction set may also include a broadcast instruction to return a pre-existing value to be added with each of the plurality of accumulated values to generate a plurality of intermediate accumulated values. In one example, a graphics processor may execute the instruction set to process the single atomic operation.

Abstract translation: 系统和方法可以处理单个原子操作。 可以生成指令集以用单个原子操作来替换多个原子操作。 指令集可以包括用于计算与多个处理通道相关联的多个初始值的前缀和以产生多个累加值的累加指令。 指令集还可以包括广播指令，以返回要添加的多个累积值中的每一个的预先存在的值，以生成多个中间累加值。 在一个示例中，图形处理器可以执行指令集以处理单个原子操作。