Method and apparatus for improving power gain and loss for interconect configurations
    32.
    发明申请
    Method and apparatus for improving power gain and loss for interconect configurations 审中-公开
    改善功率增益和相位配置损耗的方法和装置

    公开(公告)号:US20100276188A1

    公开(公告)日:2010-11-04

    申请号:US12655858

    申请日:2010-01-08

    Inventor: James V. Russell

    Abstract: The present disclosure relates to embedding a power modification component such as a capacitance or a resistance inside of pads that are located to extend over and beyond the vias of the PCB so that a portion of the pad containing the embedded capacitance or resistance is located beyond where the vias or blinds are located. Each of the pads will include an opening that is located over a given one of the vias or blinds to permit that via to conduct through the opening. In this way the capacitance and the resistance will have a closer contact point the electrical component.

    Abstract translation: 本公开涉及嵌入诸如电极内部的电容或电阻内部的电力修改部件,其位于延伸超过PCB的通孔的位置,使得包含嵌入的电容或电阻的焊盘的一部分位于 通道或百叶窗位于。 每个垫将包括位于通孔或百叶窗中的给定一个上的开口,以允许该通孔穿过开口。 以这种方式,电容和电阻将具有更接近的电气部件的接触点。

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