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公开(公告)号:US20240015887A1
公开(公告)日:2024-01-11
申请号:US18255853
申请日:2021-12-14
Applicant: Tesla, Inc.
Inventor: Jin Zhao , Satyan Chandra , Shishuang Sun
CPC classification number: H05K1/113 , H05K3/3436 , H05K3/3442 , H05K3/328 , H05K2201/10636 , H05K2201/10734 , H05K2201/10015 , H05K2203/101 , H05K2203/107
Abstract: A structure with an electronic component array positioned between two stacked printed circuit boards (600,606) is disclosed. The electronic components (502) of the array can be connected to the printed circuit board (600,606) by way of solder connections. Example electronic components (502) include capacitors. Related methods of manufacture are disclosed that involve applying heat to a solder paste array on a printed circuit board (600,606) to form solid conductors electrically connected to the electronic components (502).
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公开(公告)号:US20230403796A1
公开(公告)日:2023-12-14
申请号:US18455234
申请日:2023-08-24
Applicant: CANON KABUSHIKI KAISHA
Inventor: Noritake Tsuboi , Tomohisa Ishigami
CPC classification number: H05K1/181 , H05K1/111 , H04N23/51 , H05K2201/10015 , H05K2201/1003 , H05K2201/10636 , H05K2201/10651 , H05K2201/099 , H05K2201/10522 , H04N23/54
Abstract: A printed circuit board includes a first chip component, a second chip component, and a printed wiring board. The first chip component and the second chip component each has a length L2 in the longitudinal direction. A relationship of 0.894≤L2/L1≤1.120 is satisfied, where L1 represents a length of the first opening in the longitudinal direction. A relationship of 0.894≤L2/L4≤1.120 is satisfied, where length L4 represents a length of the second opening in the longitudinal direction. A relationship of 0.183≤LOA/LiA≤0.309 is satisfied, where LiA represents a length of the first land in the longitudinal direction, and LOA represents a thickness of solder on an end surface of the first electrode. A relationship of 0.183≤LOB/LiB≤0.309 is satisfied, where LiB represents a length of the second land in the longitudinal direction, and LOB represents a thickness of solder on an end surface of the second electrode.
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公开(公告)号:US20230389187A1
公开(公告)日:2023-11-30
申请号:US18320953
申请日:2023-05-19
Applicant: YAZAKI CORPORATION
Inventor: Hidehiko Shimizu
IPC: H05K1/18 , H01M50/519 , H01M50/505
CPC classification number: H05K1/189 , H01M50/519 , H01M50/505 , H05K2201/10022 , H05K2201/10151 , H05K2201/10181 , H05K2201/10272 , H05K2201/2018 , H05K2201/10636 , H05K2201/2009
Abstract: A conductive module includes: a flexible printed wiring board; an electronic component that is mounted on the flexible printed wiring board and connected to a circuit pattern of the flexible printed wiring board; a metal plate that includes a frame part surrounding the electronic component and being fixed to the flexible printed wiring board; and a potting agent that is filled in a region surrounded by the frame part to cover the electronic component.
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公开(公告)号:US11792936B2
公开(公告)日:2023-10-17
申请号:US17810917
申请日:2022-07-06
Applicant: CANON KABUSHIKI KAISHA
Inventor: Noritake Tsuboi , Tomohisa Ishigami
CPC classification number: H05K1/181 , H04N23/51 , H05K1/111 , H04N23/54 , H04N23/55 , H05K2201/099 , H05K2201/1003 , H05K2201/10015 , H05K2201/10522 , H05K2201/10636 , H05K2201/10651
Abstract: A printed circuit board includes a first chip component, a second chip component, and a printed wiring board. The first chip component and the second chip component each has a length L2 in the longitudinal direction. A relationship of 0.894≤L2/L1≤1.120 is satisfied, where L1 represents a length of the first opening in the longitudinal direction. A relationship of 0.894≤L2/L4≤1.120 is satisfied, where length L4 represents a length of the second opening in the longitudinal direction. A relationship of 0.183≤LOA/LiA≤50.309 is satisfied, where LiA represents a length of the first land in the longitudinal direction, and LOA represents a thickness of solder on an end surface of the first electrode. A relationship of 0.183≤LOB/LiB≤0.309 is satisfied, where LiB represents a length of the second land in the longitudinal direction, and LOB represents a thickness of solder on an end surface of the second electrode.
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公开(公告)号:US20230284388A1
公开(公告)日:2023-09-07
申请号:US17687890
申请日:2022-03-07
Applicant: Western Digital Technologies, Inc.
Inventor: Joyce Chen , Lynn Lin , Emma Wang , Linda Huang , Cong Zhang , Zengyu Zhou , Juan Zhou
CPC classification number: H05K1/181 , H05K3/3442 , H05K3/3452 , H05K2201/10636 , H05K2201/10015 , H05K2201/10022 , H05K2201/1003
Abstract: A surface mount device having features on contacts to prevent the surface mount device from tombstoning. The feature may be channel defined by the contact that helps balance a torque/force applied on each side of the surface mount device during a reflow soldering process. The feature may also be a solder mask that helps balance a torque/force applied on each side of the surface mount device during a reflow soldering process.
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公开(公告)号:US20230276575A1
公开(公告)日:2023-08-31
申请号:US18169432
申请日:2023-02-15
Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
Inventor: Yukinori HATORI , Takashi KURIHARA , Kiyoshi OI
CPC classification number: H05K1/185 , H05K3/4605 , H05K1/115 , H05K2201/10636
Abstract: An embedded PCB includes a first substrate, an electronic component mounted on the first substrate, a second substrate provided on a side opposite to the first substrate with the electronic component interposed therebetween, and electrically connected to the first substrate via substrate bonding members, and an encapsulating resin filled between the first and second substrates, covering the electronic component, and also filled between the electronic component and the first substrate. The first substrate includes, on a side closer to the electronic component, pads to be bonded to electrodes of the electronic component via bonding portions, and a protective insulating layer including openings. The pads include outermost peripheral pads in an outermost periphery including four corners of an approximately rectangular area in a plan view, and inner pads in an area surrounded by the outermost peripheral pads.
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公开(公告)号:US20230223197A1
公开(公告)日:2023-07-13
申请号:US18124620
申请日:2023-03-22
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Yuichiro TANAKA , Hiroki AWATA
CPC classification number: H01G4/2325 , H05K1/185 , H01G4/30 , H01G4/248 , H05K2201/10636 , H05K2201/10015
Abstract: A component built-in substrate includes a multilayer body and a substrate including a multilayer ceramic electronic component embedded therein. The multilayer ceramic electronic component includes a first connection portion that protrudes from the first external electrode, and a second connection portion that protrudes from the second external electrode. The substrate includes a core material. The multilayer ceramic electronic component including the first connection portion and the second connection portion includes a surface covered by the core material and embedded in the substrate. The first connection portion protrudes toward a surface of the substrate, and is not exposed at the surface of the substrate. The second connection portion protrudes toward the surface of the substrate, and is not exposed at the surface of the substrate.
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公开(公告)号:US20190228886A1
公开(公告)日:2019-07-25
申请号:US16371885
申请日:2019-04-01
Applicant: ROHM CO., LTD.
Inventor: Masaki YONEDA
CPC classification number: H01C1/012 , H01C1/014 , H01C1/028 , H01C1/14 , H01C1/142 , H01C3/12 , H05K1/181 , H05K3/3442 , H05K2201/10022 , H05K2201/10636 , Y02P70/611
Abstract: A chip resistor with a reduced thickness is provided. The chip resistor includes an insulating substrate, a resistor embedded in the substrate, a first electrode electrically connected to the resistor, and a second electrode electrically connected to the resistor. The first electrode and the second electrode are spaced apart from each other in a lateral direction that is perpendicular to the thickness direction of the substrate.
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公开(公告)号:US20180323010A1
公开(公告)日:2018-11-08
申请号:US15810738
申请日:2017-11-13
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor: Heung Kil PARK , Jae Yeol CHOI , Young Ghyu AHN , Soo Hwan SON , Se Hun PARK , Gu Won JI
CPC classification number: H01G4/232 , H01G2/065 , H01G4/012 , H01G4/1227 , H01G4/248 , H01G4/30 , H05K1/111 , H05K1/181 , H05K3/3442 , H05K2201/10015 , H05K2201/10636 , H05K2201/1078
Abstract: A multilayer electronic component includes a capacitor body including a plurality of dielectric layers and a plurality of first and second internal electrodes alternately disposed with respective dielectric layers interposed therebetween. One end of each of the first and second internal electrodes extends, respectively, to a third or fourth surface of the capacitor body. First and second external electrodes respectively include first and second connected portions disposed on the third and fourth surfaces, and first and second band portions respectively extended from the first and second connected portions to portions of a first surface of the capacitor body. A first connection terminal is disposed on the first band portion to provide a first solder accommodating portion, and a second connection terminal is disposed on the second band portion to provide a second solder accommodating portion.
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公开(公告)号:US10083887B2
公开(公告)日:2018-09-25
申请号:US14043381
申请日:2013-10-01
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Yoichi Saito , Toru Yoshioka
CPC classification number: H01L23/3121 , H01L2224/16225 , H01L2924/15313 , H05K1/184 , H05K1/186 , H05K3/4617 , H05K3/4632 , H05K2201/09781 , H05K2201/10636 , H05K2203/063 , Y02P70/611
Abstract: The present invention provides a chip component-embedded resin multilayer substrate including a laminating body obtained by laminating a plurality of resin layers, a predetermined wiring conductor disposed in the laminating body, and a chip component embedded in the laminating body and having a side terminal electrode. A guarding member electrically isolated from the wiring conductor is provided to cover at least a part of a boundary between the side terminal electrode and the resin layers when viewed from a lamination direction of the laminating body, and the guarding member is formed from a material having a melting point higher than a temperature at which the resin layer begins to flow.
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