公开(公告)号：US20240345443A1

公开(公告)日：2024-10-17

申请号：US18751489

申请日：2024-06-24

Applicant: Japan Display Inc.

Inventor： Motoharu MIYAMOTO

IPC: G02F1/1343 ,  G02F1/1339 ,  G02F1/1362

CPC classification number: G02F1/134363 ,  G02F1/1339 ,  G02F1/13394 ,  G02F1/136286 ,  G02F1/134309 ,  G02F1/134318

Abstract: The liquid crystal display device includes: a TFT substrate including scanning lines extending in a first direction and being arranged in a second direction, video signal lines extending in the second direction and being arranged in the first direction, pixel electrodes arranged in regions surrounded by the scanning lines and the video signal lines, and common electrodes formed with an insulating film arranged between the common electrodes and the pixel electrodes; a counter substrate opposed to the TFT substrate; and a liquid crystal. The first common electrode extends between the first and second scanning lines in the first direction, and the second common electrode extends between the second and third scanning lines in the first direction. The first and second common electrodes are electrically connected by a bridge. The bridge covers the first video signal line without covering the second video signal line, when seen in a plan view.

公开(公告)号：US20230408871A1

公开(公告)日：2023-12-21

申请号：US18449752

申请日：2023-08-15

Applicant: Japan Display Inc.

Inventor： Masateru MORIMOTO ,  Saori SUGIYAMA ,  Motoharu MIYAMOTO

IPC: G02F1/1339 ,  G02F1/1362

CPC classification number: G02F1/13394 ,  G02F1/136286 ,  G02F1/134372

Abstract: The displacement between a TFT substrate and a counter substrate and the cut of an alignment film caused by a columnar spacer are prevented. A liquid crystal display device includes: a TFT substrate including a scanning line extending in a first direction, a picture signal line extending in a second direction, a pixel electrode formed in a region surrounded by the scanning line and the picture signal line, and a common electrode formed as opposed to the pixel electrode through an insulating film; a counter substrate disposed as opposed to the TFT substrate and having a spacer; and a liquid crystal sandwiched between the substrates. A common metal interconnection is formed to cover the picture signal line or the scanning line, and stacked on the common electrode. A through hole is formed on the common metal interconnection. The tip end of the spacer is disposed inside the through hole.

公开(公告)号：US20210088855A1

公开(公告)日：2021-03-25

申请号：US17114676

申请日：2020-12-08

Applicant: Japan Display Inc.

Inventor： Motoharu MIYAMOTO

IPC: G02F1/1343 ,  G02F1/1362 ,  G02F1/1339

Abstract: The liquid crystal display device includes: a TFT substrate including scanning lines extending in a first direction and being arranged in a second direction, video signal lines extending in the second direction and being arranged in the first direction, pixel electrodes arranged in regions surrounded by the scanning lines and the video signal lines, and common electrodes formed with an insulating film arranged between the common electrodes and the pixel electrodes; a counter substrate opposed to the TFT substrate; and a liquid crystal. The first common electrode extends between the first and second scanning lines in the first direction, and the second common electrode extends between the second and third scanning lines in the first direction. The first and second common electrodes are electrically connected by a bridge. The bridge covers the first video signal line without covering the second video signal line, when seen in a plan view.

公开(公告)号：US20190064617A1

公开(公告)日：2019-02-28

申请号：US16171728

申请日：2018-10-26

Applicant: Japan Display Inc.

Inventor： Takahiro OCHIAI ,  Motoharu MIYAMOTO ,  Masahiro HOSHIBA

IPC: G02F1/1362 ,  G02F1/1368 ,  H01L27/12 ,  G09G3/36 ,  G02F1/1335 ,  H01L29/786 ,  G02F1/1345

Abstract: A liquid crystal display device is provided with a thin film transistor which includes a gate electrode film that is provided in a first electrode layer located over a first insulating layer, a semiconductor film that is disposed over the gate electrode film via a second insulating layer, a drain electrode and a source electrode that are provided in a second electrode layer located over the semiconductor film and are in contact with an upper surface of the semiconductor film, and a light blocking film that is disposed under the first insulating layer. At least a part thereof overlaps the semiconductor film and the gate electrode film in a plan view. One of the drain electrode and the source electrode is connected to a gate line, and the light blocking film is electrically connected to the source electrode.

公开(公告)号：US20180045993A1

公开(公告)日：2018-02-15

申请号：US15662350

申请日：2017-07-28

Applicant: Japan Display Inc.

Inventor： Motoharu MIYAMOTO

IPC: G02F1/1337 ,  G02F1/1362 ,  G02F1/1343 ,  G02F1/1368

CPC classification number: G02F1/1337 ,  G02F1/134363 ,  G02F1/13439 ,  G02F1/136213 ,  G02F1/136227 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/134372 ,  G02F2201/121 ,  G02F2201/123

Abstract: The invention prevents the display unevenness of a high-resolution liquid crystal display device that results from the presence of regions where an alignment film is not applied. The invention provides a liquid crystal display device including: a TFT substrate having scan lines, video signal lines, and pixels formed by the intersecting scan lines and video signal lines; a counter substrate; and a liquid crystal layer placed between the TFT substrate and the counter substrate. Each of the pixels includes a TFT, a pixel electrode, a common electrode, and a through-hole and an opening that are used to connect the TFT and the pixel electrode. Connective ITO is formed in and around the through-hole at the same time as the common electrode is formed. A step d is formed at an edge portion of the connective ITO and covered with an alignment film.

公开(公告)号：US20170371215A1

公开(公告)日：2017-12-28

申请号：US15698760

申请日：2017-09-08

Applicant: Japan Display Inc.

Inventor： Motoharu MIYAMOTO

IPC: G02F1/1343 ,  G02F1/1362

CPC classification number: G02F1/134363 ,  G02F1/136286 ,  G02F2001/134318

Abstract: The liquid crystal display device includes: a TFT substrate including scanning lines extending in a first direction and being arranged in a second direction, Video signal lines extending in the second direction and being arranged in the first direction, pixel electrodes arranged in regions surrounded by the scanning lines and the video signal lines, and common electrodes formed with an insulating film arranged between the common electrodes and the pixel electrodes; a counter substrate opposed to the TFT substrate; and a liquid. crystal. The first common electrode extends between the first and second scanning lines in the first direction, and the second common electrode extends between the second and third scanning lines in the first direction. The first and second common electrodes are electrically connected by a bridge. The bridge covers the first video signal line without covering the second video signal line, when seen in a plan view.

公开(公告)号：US20170299929A1

公开(公告)日：2017-10-19

申请号：US15641403

申请日：2017-07-05

Applicant: Japan Display Inc.

Inventor： Takahiro OCHIAI ,  Motoharu MIYAMOTO ,  Masahiro HOSHIBA

IPC: G02F1/1362 ,  H01L29/786 ,  H01L27/12 ,  G02F1/1335 ,  G09G3/36 ,  G02F1/1368 ,  G02F1/1345

CPC classification number: G02F1/136209 ,  G02F1/133512 ,  G02F1/13454 ,  G02F1/136227 ,  G02F1/1368 ,  G09G3/3677 ,  G09G3/3688 ,  G09G2300/0809 ,  G09G2310/0202 ,  H01L27/1222 ,  H01L27/124 ,  H01L29/78609 ,  H01L29/78633 ,  H01L29/78669

Abstract: A liquid crystal display device is provided with a thin film transistor which includes a gate electrode film that is provided in a first electrode layer located over a first insulating layer, a semiconductor film that is disposed over the gate electrode film via a second insulating layer, a drain electrode and a source electrode that are provided in a second electrode layer located over the semiconductor film and are in contact with an upper surface of the semiconductor film, and a light blocking film that is disposed under the first insulating layer. At least a part thereof overlaps the semiconductor film and the gate electrode film in a plan view. One of the drain electrode and the source electrode is connected to a gate line, and the light blocking film is electrically connected to the source electrode.

公开(公告)号：US20170153482A1

公开(公告)日：2017-06-01

申请号：US15359949

申请日：2016-11-23

Applicant: Japan Display Inc.

Inventor： Motoharu MIYAMOTO

IPC: G02F1/1339 ,  G02F1/1362 ,  G02F1/1343 ,  G02F1/1335

CPC classification number: G02F1/13394 ,  G02F1/133345 ,  G02F1/133512 ,  G02F1/133514 ,  G02F1/133528 ,  G02F1/1337 ,  G02F1/133707 ,  G02F1/1339 ,  G02F1/1343 ,  G02F1/134363 ,  G02F1/136227 ,  G02F1/136286 ,  G02F2201/121 ,  G02F2201/123

Abstract: According to one embodiment, a liquid crystal display device includes a first substrate including a scanning line, a first relay electrode, a second relay electrode, a first contact portion opposed to the first relay electrode, and a second contact portion opposed to the second relay electrode, and a spacer, a first contact hole for connecting the first relay electrode and the first contact portion being located on one side with respect to the scanning line, a second contact hole for connecting the second relay electrode and the second contact portion being located on the other side with respect to the scanning line, the spacer being located between the first contact hole and the second contact hole.

公开(公告)号：US20170076685A1

公开(公告)日：2017-03-16

申请号：US15358209

申请日：2016-11-22

Applicant: Japan Display Inc.

Inventor： Motoharu MIYAMOTO ,  Takahiro Ochiai

IPC: G09G3/36 ,  G02F1/1345 ,  G02F1/133

CPC classification number: G09G3/3677 ,  G02F1/13306 ,  G02F1/1345 ,  G09G3/2096 ,  G09G2300/0426 ,  G09G2300/0809 ,  G09G2310/0202 ,  G09G2310/065

Abstract: A circuit block of a driving circuit of a display device includes a first transistor that has a gate being connected to a first node having an active potential during an output period, and controls electrical conduction between a first clock signal line being applied with a first clock signal and the scanning signal line, a second transistor that has a gate being connected to a node having an active potential during a non-output period, and controls electrical conduction between the first node and an inactive potential line, and a third transistor that has a gate being connected to the fir at node, and controls electrical conduction between the second node and a first cyclic signal line applied with a first period signal having an active potential at the time of termination of the output period.

Abstract translation: 显示装置的驱动电路的电路块包括第一晶体管，其在输出周期期间具有连接到具有有效电位的第一节点的栅极，并且控制施加于第一时钟的第一时钟信号线之间的导通 信号和扫描信号线，第二晶体管，其在非输出时段内具有连接到具有有效电位的节点的栅极，并且控制第一节点和非活动电位线之间的电导;以及第三晶体管，其具有 栅极连接到节点处的冷杉，并且控制第二节点与施加在输出周期结束时具有有效电位的第一周期信号的第一循环信号线之间的导电。

公开(公告)号：US20160035272A1

公开(公告)日：2016-02-04

申请号：US14883338

申请日：2015-10-14

Applicant: Japan Display Inc.

Inventor： Motoharu MIYAMOTO ,  Takahiro OCHIAI

IPC: G09G3/20

CPC classification number: G09G3/3677 ,  G02F1/13306 ,  G02F1/1345 ,  G09G3/2096 ,  G09G2300/0426 ,  G09G2300/0809 ,  G09G2310/0202 ,  G09G2310/065

Abstract: A circuit block of a driving circuit of a display device includes a first transistor that has a gate being connected to a first node having an active potential during an output period, and controls electrical conduction between a first clock signal line being applied with a first clock signal and the scanning signal line, a second transistor that has a gate being connected to a second node having an active potential during a non-output period, and controls electrical conduction between the first node and an inactive potential line, and a third transistor that has a gate being connected to the first node, and controls electrical conduction between the second node and a first cyclic signal line applied with a first period signal having an active potential at the time of termination of the output period.

Abstract translation: 显示装置的驱动电路的电路块包括第一晶体管，其在输出周期期间具有连接到具有有效电位的第一节点的栅极，并且控制施加于第一时钟的第一时钟信号线之间的导通 信号和扫描信号线，第二晶体管，其在非输出时段期间具有连接到具有有效电位的第二节点的栅极，并控制第一节点与非活动电位线之间的电导;以及第三晶体管， 具有连接到第一节点的栅极，并且控制第二节点与施加在输出周期结束时具有有效电位的第一周期信号的第一循环信号线之间的导电。