公开(公告)号：US08610474B2

公开(公告)日：2013-12-17

申请号：US13498884

申请日：2010-10-09

申请人： Farshid Aryanfar ,  Hae-Chang Lee ,  Kun-Yung Chang ,  Ting Wu ,  Carl Werner ,  Masoud Koochakzadeh

发明人： Farshid Aryanfar ,  Hae-Chang Lee ,  Kun-Yung Chang ,  Ting Wu ,  Carl Werner ,  Masoud Koochakzadeh

IPC分类号： H03L7/06

CPC分类号： H03L7/093 ,  G06F1/10 ,  H03L7/0802

摘要： A signal distribution network has segments that each have a buffer circuit, a transmission line coupled to the buffer circuit, an inductor coupled to the buffer circuit through the transmission line, and a variable capacitance circuit coupled to the inductor and coupled to the buffer circuit through the transmission line. A capacitance of the variable capacitance circuit is set to determine a phase and an amplitude of a signal transmitted through the transmission line. A signal distribution network can include a phase detector, a loop filter circuit, and a resonant delay circuit. The phase detector compares a phase of a first periodic signal to a phase of a second periodic signal. The resonant delay circuit has a variable impedance circuit having an impedance that varies based on changes in an output signal of the loop filter circuit.

公开(公告)号：US07764095B2

公开(公告)日：2010-07-27

申请号：US12151295

申请日：2008-05-05

申请人： Carl Werner ,  Ely Tsern

发明人： Carl Werner ,  Ely Tsern

IPC分类号： H03L7/06

CPC分类号： G06F1/04

摘要： A clock distribution network locks a local clock signal to a reference clock signal using a first feedback loop associated with a synchronization circuit (e.g., a PLL or a DLL). The local clock signal can then be selectively distributed to a plurality of clock destination nodes via a clock network. Clock distribution may be disabled as needed to save power. The first feedback loop is active irrespective of whether clock distribution is enabled. The delay through the clock network may drift due to temperature and supply-voltage fluctuations, which introduces phase errors in the distributed clock signals. A second feedback loop is activated when clock distribution is enabled to compensate for this drift.

摘要翻译： 时钟分配网络使用与同步电路（例如，PLL或DLL）相关联的第一反馈回路将本地时钟信号锁定到参考时钟信号。 然后可以经由时钟网络选择性地将本地时钟信号分配给多个时钟目的地节点。 可根据需要禁用时钟分配以节省电量。 无论时钟分配是否启用，第一个反馈回路都处于活动状态。 通过时钟网络的延迟可能由于温度和电源电压波动而漂移，这引起了分布式时钟信号中的相位误差。 当启用时钟分配来补偿此漂移时，第二个反馈环路被激活。

公开(公告)号：US20060256626A1

公开(公告)日：2006-11-16

申请号：US11460325

申请日：2006-07-27

申请人： Carl Werner ,  Andreas Haeberli ,  Leon Wong ,  Cheng-Yuan Wang ,  Hock So ,  Sau Wong

发明人： Carl Werner ,  Andreas Haeberli ,  Leon Wong ,  Cheng-Yuan Wang ,  Hock So ,  Sau Wong

IPC分类号： G11C7/10

CPC分类号： G11C11/5642 ,  G11C5/145 ,  G11C7/16 ,  G11C11/56 ,  G11C11/5621 ,  G11C11/5628 ,  G11C16/12 ,  G11C16/30 ,  G11C16/32 ,  G11C27/005 ,  G11C27/02 ,  G11C27/026

摘要： Techniques are used to store information in a medium such as the memory cells of an integrated circuit, and also retrieval of information from the medium. The integrated circuit includes nonvolatile memory cells (416) capable of multilevel or analog voltage level storage. The integrated circuit may store or record information in analog or digital form, or both. Information is stored in and retrieved from the integrated circuit using a user-selected sampling frequency. The user's selection of the sampling frequency is stored within the integrated circuit.

摘要翻译： 技术用于在诸如集成电路的存储器单元的介质中存储信息，并且还从介质检索信息。 集成电路包括能够进行多电平或模拟电压电平存储的非易失性存储单元（416）。 集成电路可以以模拟或数字形式或两者存储或记录信息。 使用用户选择的采样频率将信息存储在集成电路中并从集成电路检索。 用户对采样频率的选择存储在集成电路内。

公开(公告)号：US20050198150A1

公开(公告)日：2005-09-08

申请号：US10767785

申请日：2004-01-29

申请人： Carl Werner

发明人： Carl Werner

IPC分类号： H04L12/18 ,  H04L12/58 ,  G06F15/16

CPC分类号： H04L51/04 ,  H04L12/1895 ,  H04L51/30

摘要： A quick and efficient method of disbursing system “alerts” and “updates” to computers utilizes automated IM messages that are sent to targeted IM groups, where the groups are “targeted” by a system administrator based upon the definitions of the various IM groups. The automated IM will appear as a “pop up” to each IM session member in real time, and may include a “trailer” defining the message as automated and thereby not allowing the IM members to respond (other than to acknowledge receipt, if desired). The system administrator may also include a listing of email addresses for the various members of each IM group, where an email message including the update/alert may be sent to any IM group member not involved in an IM session when the automated IM message is sent.

摘要翻译： 系统快速有效地发送系统“警报”和“更新”的方法利用自动IM消息发送到目标IM组，其中组由系统管理员根据各种IM组的定义“定位”。 自动IM将实时显示为每个IM会员的“弹出”，并且可以包括将消息定义为自动化的“预告片”，从而不允许IM成员回应（除了如果需要的话确认收据 ）。 系统管理员还可以包括每个IM组的各个成员的电子邮件地址的列表，其中当发送自动IM消息时，包括更新/警报的电子邮件消息可被发送到IM参与IM会话中未参与IM会话的IM组成员 。

公开(公告)号：US20050157780A1

公开(公告)日：2005-07-21

申请号：US11022292

申请日：2004-12-24

申请人： Carl Werner ,  Andrew Ho

发明人： Carl Werner ,  Andrew Ho

IPC分类号： H03K19/003 ,  H04L25/02 ,  H04L25/03 ,  H04L25/06 ,  H04L25/49 ,  H03K5/159

CPC分类号： H04L25/03057 ,  H04L25/028 ,  H04L25/0292 ,  H04L25/03343 ,  H04L25/061 ,  H04L25/4906

摘要： An integrated circuit having a receiver that selectively inhibits incoming data from being used to update adaptively generated controls. Sampling circuitry generates a plurality of samples of an incoming signal. Control circuitry generates an inhibit signal in either a first state or a second state according to whether the plurality of samples meets a randomness criterion. Tap weight update circuitry receives the inhibit signal from the control circuitry and updates a plurality of equalizer tap weights based on the plurality of samples if the inhibit signal is in the first state. The tap weight update circuitry refrains from updating the plurality of equalizer tap weights based on the plurality of samples if the inhibit signal is in the second state.

摘要翻译： 具有选择性地禁止输入数据被用于更新自适应生成的控制的接收器的集成电路。 采样电路产生输入信号的多个采样。 根据多个样本是否满足随机标准，控制电路在第一状态或第二状态中产生禁止信号。 抽头加权更新电路从控制电路接收禁止信号，并且如果禁止信号处于第一状态则基于多个采样来更新多个均衡器抽头权重。 如果禁止信号处于第二状态，则抽头加权更新电路基于多个采样来禁止更新多个均衡器抽头权重。