摘要:
A three-terminal low-voltage PWM controller chip includes a first terminal for receiving operating bias current supply and a feedback control signal related to an output parameter of an electrical circuit to be controlled; a second terminal connected to an output switch providing digital width-modulated control pulses to control duty cycle of the electrical circuit; a third terminal ground connection; a clocked pulse width modulation circuit responsive to current flow between the second terminal and the third terminal and the feedback control value for controlling the digital output switch; and, feedback signal separation circuitry for separating the feedback control signal from the operating bias current supply. A start-up circuit is also provided.
摘要:
A digitally programmable integrated-circuit analog-signal servo co-processor has digital programming contact pads to which an external microprocessor may be connected, has analog-signal input pads and analog-signal output pads, and includes a plurality of programmable analog-signal-manipulating circuits (ASMC's). Each of the ASMC's has input and output terminals connected to an input programmable-switch matrix so that one or a combination of the ASMC blocks may be connected between the analog-signal input and output contact pads of the integrated circuit. Certain ASMC blocks have microprocessor programmable transfer functions, e.g. ASMC integrator, notch filter, low pass filter, PD compensator and voltage divider. Key ones of those ASMC blocks are discrete-time circuits including switched-capacitor resistors and have transfer functions wherein the parameters are ratios of capacitances and the switching rate frequency to provide accurate and stable performance. This versatile system of digitally programmable circuit configurations and digitally programmable analog (ASMC) transfer functions provides a hybrid analog and digital servo co-processor having high speed, versatility and stability and a low power consumption.
摘要:
A disk drive employs transversal filters as equalizers for each of its read heads, permitting adaptive equalization of read head signals, optimized for each track position.
摘要:
A first control system for a power supply includes a switch-mode DC-DC converter module and an FET gate drive module. The switch-mode DC-DC converter module receives an input voltage and generates first and second voltages, the first voltage powering a DC-DC control module. The FET gate drive module selectively drives a plurality of FETs of the power supply using the second voltage thereby generating a desired output voltage from the input voltage. A second control system is directed to driving the second voltage to a desired gate voltage, wherein the desire gate voltage is determined based on at least one of a plurality of operating parameters. A third control system includes controlling first and second voltages generated by a SIDO voltage converter based on the first and second voltages and a damping factor, and generating the damping factor based on current flowing through the inductor of the SIDO voltage converter.
摘要:
A method and apparatus for converting a DC voltage to a lower DC voltage, provides for conducting current from an input terminal, through an inductor to charge a capacitor connected to the inductor at an output terminal and to provide a varying range of load current from the output terminal, alternately switching the input terminal between a supply voltage and a ground potential to produce a desired voltage at the output terminal that is lower than the supply voltage, while providing the varying range of load current, and disconnecting the input terminal from both the supply voltage and the ground potential to reduce an increase in voltage at the output terminal caused by a substantial reduction in the load current, while current through the inductor adjusts in response to the reduced load current.
摘要:
A first control system for a power supply includes a switch-mode DC-DC converter module and an FET gate drive module. The switch-mode DC-DC converter module receives an input voltage and generates first and second voltages, the first voltage powering a DC-DC control module. The FET gate drive module selectively drives a plurality of FETs of the power supply using the second voltage thereby generating a desired output voltage from the input voltage. A second control system is directed to driving the second voltage to a desired gate voltage, wherein the desire gate voltage is determined based on at least one of a plurality of operating parameters. A third control system includes controlling first and second voltages generated by a SIDO voltage converter based on the first and second voltages and a damping factor, and generating the damping factor based on current flowing through the inductor of the SIDO voltage converter.
摘要:
A system includes a first switch connected to a voltage input and a switching node. A second switch is connected to the switching node and a reference potential. A first circuit generates first rising edges and first falling edges by comparing a voltage at the switching node to a first voltage reference. The first voltage reference is between the reference potential and the voltage input. A second circuit generates second rising edges and second falling edges by comparing the switching node voltage to a second voltage reference. The second voltage reference is less than the reference potential. The controller calculates delay times based on the first rising edges, the first falling edges, the second rising edges and the second falling edges. The controller generates drive signals for the first switch and the second switch based on a duty cycle and the delay times.
摘要:
In one embodiment, the digital pulse width modulator of these teachings includes comparators and a number of phases and capable of increasing resolution without increasing clock frequency. In another embodiment, the digital pulse width modulator (DPWM) of these teachings includes equality comparators and a number of phases and increases resolution without increasing clock frequency. A further embodiment of the system of these teachings includes a priority encoded comparator component (in one instance including a number of comparators) comparing duty cycle commands against preset minimums, that embodiment being referred to as a frequency Foldback component. Other embodiments and embodiments of the method of these teachings are also disclosed.
摘要:
Methods for selecting between the two modes (states) of operation, continuous conduction and discontinuous conduction, are disclosed. Systems that are capable of selecting the operating mode and operating in the continuous conduction mode or the discontinuous conduction mode are also disclosed.
摘要:
Methods for selecting between the two modes (states) of operation, continuous conduction and discontinuous conduction, are disclosed. Systems that are capable of selecting the operating mode and operating in the continuous conduction mode or the discontinuous conduction mode are also disclosed.