公开(公告)号：US07943918B2

公开(公告)日：2011-05-17

申请号：US12568402

申请日：2009-09-28

申请人： Jeong-Hee Park ,  Ju-Chul Park ,  Jun-Soo Bae ,  Bong-Jin Kuh ,  Yong-Ho Ha

发明人： Jeong-Hee Park ,  Ju-Chul Park ,  Jun-Soo Bae ,  Bong-Jin Kuh ,  Yong-Ho Ha

IPC分类号： H01L45/00

CPC分类号： H01L45/06 ,  G11C13/0004 ,  G11C2213/79 ,  H01L45/1233 ,  H01L45/143 ,  H01L45/144 ,  H01L45/1625 ,  H01L45/1675

摘要： A phase-changeable memory device includes a phase-changeable material pattern and first and second electrodes electrically connected to the phase-changeable material pattern. The first and second electrodes are configured to provide an electrical signal to the phase-changeable material pattern. The phase-changeable material pattern includes a first phase-changeable material layer and a second phase-changeable material layer. The first and second phase-changeable material patterns have different chemical, physical, and/or electrical characteristics. For example, the second phase-changeable material layer may have a greater resistivity than the first phase-changeable material layer. For instance, the first phase-changeable material layer may include nitrogen at a first concentration, and the second phase-changeable material layer may include nitrogen at a second concentration that is greater than the first concentration. Related devices and fabrication methods are also discussed.

摘要翻译： 可变相存储器件包括相变材料图案，以及电连接到相变材料图案的第一和第二电极。 第一和第二电极被配置为向相变材料图案提供电信号。 相变材料图案包括第一相变材料层和第二相变材料层。 第一和第二可相变材料图案具有不同的化学，物理和/或电特性。 例如，第二可相变材料层的电阻率可以比第一相变材料层更大。 例如，第一相变材料层可以包括第一浓度的氮，第二相变材料层可以包括大于第一浓度的第二浓度的氮。 还讨论了相关设备和制造方法。

公开(公告)号：US20060040485A1

公开(公告)日：2006-02-23

申请号：US11201421

申请日：2005-08-11

申请人： Jang-Eun Lee ,  Sung-Lae Cho ,  Jeong-Hee Park

发明人： Jang-Eun Lee ,  Sung-Lae Cho ,  Jeong-Hee Park

IPC分类号： H01L21/44

CPC分类号： H01L21/76877 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/143 ,  H01L45/144 ,  H01L45/1683

摘要： Provided are methods for forming conductive plug structures, such as via plugs, from a plurality of conductive layer patterns and methods of fabricating semiconductor devices, including semiconductor memory devices such as phase change semiconductor memory devices. An example method forms a small via structure by forming a conductive layer on a semiconductor substrate. A molding insulating layer is formed on the conductive layer and a via hole is formed through the insulating layer to expose a region of the conductive layer. A first via filling layer is formed and then partially removed to form a partial via plug. The formation and removal of the phase change material layer are then repeated as necessary to form a multilayer plug structure that substantially fills the via hole with the multilayer structure typically exhibiting reduced defects and damage than plug structures prepared by conventional methods.