摘要:
A computer system including a power supply and N main boards is provided, herein N is an integer greater than 1. The power supply generates a main power and a standby power. The N main boards respectively correspond to one standby voltage. The 1st to the (N−1)th main boards respectively generate the corresponding standby voltage by the main power in a power-on state, and respectively generate the corresponding standby voltage by the standby power in a power-off state. The Nth main board generates the corresponding standby voltage by the main power in the power-on and power-off state.
摘要:
An apparatus for resolving conflicts happened between two I2C slave devices with the same addressed address is provided. The apparatus is composed by all cheap electronic devices, so as to achieve a purpose of lowering a cost for design. In addition, in the apparatus for resolving conflicts happened between two I2C slave devices with the same addressed address of the invention, all the I2C slave devices are addressed by an I2C master device to perform the data transmission subsequently before a basic input/output system (BIOS) completes a power-on self-test (POST), but all the I2C slave devices are addressed by a system chip (for example, a baseboard management controller (BMC)) to perform the data transmission subsequently after the BIOS completes the POST. Therefore, the purpose of performing the data transmission for all the I2C slave devices on real time is achieved.
摘要:
A computer capable of automatic bandwidth configuration according to I/O expansion card (e.g., PCI-Express expansion card) type is provided. A motherboard of the computer includes an I/O expansion slot, a chipset, and a configuration setting circuit. When the I/O expansion slot supports different types of I/O expansion cards having multiple interface card slot combinations, a corresponding bandwidth configuration message is generated on the I/O expansion card. The bandwidth configuration message is used to indicate the type of the I/O expansion card that is being used and thereby control the configuration setting circuit to adjust the bandwidth configuration in the chipset.
摘要:
A power converting device including a pulse width modulation circuit, a switch unit, a power output unit and a voltage start unit is provided. The pulse width modulation circuit increases a start voltage in a soft start mode and is operated under the start voltage to generate a pulse width modulation signal. The switch unit is for receiving an input voltage, and forming a charge path and a discharge path alternately according to the pulse width modulation signal. The power output unit converts the input voltage to a core voltage in accordance with the charge path and the discharge path. The voltage start unit is for detecting the start voltage, and for transmitting a control signal to interrupt the formation of the discharge path when the start voltage is smaller than the core voltage.
摘要:
A structure compatible with I2C bus and system management (SM) bus is provided. The structure includes a first device having an I2C bus interface, a second device having a SM bus interface, and a timing buffering apparatus connected between the I2C bus interface and the SM bus interface. The timing buffering apparatus provides a time delay when the first device sends data to the second device so as to meet the requirement of the second device to data holding time.
摘要:
A power factor correction circuit including a boost converter, a first capacitor, a first resistor, and a boost control unit is provided. The boost control unit includes a signal generator and a frequency controller. The boost converter transforms a rectified voltage to a correction voltage according to a pulse width modulation (PWM) signal. The first capacitor and the first resistor are coupled between an input terminal and a ground terminal of the boost converter. The boost control unit is adapted to generate the PWM signal, and adjust a duty cycle and a frequency of the PWM signal according to a current flowing through the first resistance, the rectified voltage and the correction voltage. Wherein, the signal generator is adapted to generate a ramp signal and adjust a slope of the ramp signal according to a charging current. The frequency controller adjusts the charging current according to the rectified voltage.
摘要:
A computer system including a first and second main boards, a judgment unit, a power supply, a first switch and second switch is provided. The judgment unit receives a first and second power start signals from the first and second main boards, and outputs a total power start signal. The power supply outputs a power reply signal according to the total power start signal. The first and second switches determine whether to output a power good signal individually according to the first and second power start signals. When one of the first and second power start signals is available, the total power start signal and the power reply signal are available, and the power supply outputs an operating voltage. When the first and second power start signals are unavailable, the total power start signal and the power reply signal are unavailable, and the power supply stops outputting the operating voltage.
摘要:
A computer capable of automatic bandwidth configuration according to I/O expansion card (e.g., PCI-Express expansion card) type is provided. A motherboard of the computer includes an I/O expansion slot, a chipset, and a configuration setting circuit. When the I/O expansion slot supports different types of I/O expansion cards having multiple interface card slot combinations, a corresponding bandwidth configuration message is generated on the I/O expansion card. The bandwidth configuration message is used to indicate the type of the I/O expansion card that is being used and thereby control the configuration setting circuit to adjust the bandwidth configuration in the chipset.
摘要:
A power discharge control system for eliminating residual voltage of electronic components in an electronic device, is proposed, which includes a control IC for outputting first electrical signals of a first level and a second level respectively corresponding to power on and power off of the electronic device; a power supply for receiving the first electrical signal, and providing or terminating operation power to the electronic component accordingly, and delaying outputting of a second electrical signal equivalent to the first electrical signal level; a logic judgment module connected to the control IC and the power supply for receiving the first and the second electrical signals for executing logic operation process, when at least one of the first and the second electrical signals is at the first level, a third electrical signal of a third level is outputted, when both the first and the second electrical signals are at the second level, a third electrical signal of a fourth level is outputted; and at least a discharge module for receiving the third electrical signal, when the third electrical signal is at the third level, the discharge process is skipped, when the third electrical signal is at the fourth level, the discharge process is executed.
摘要:
The invention provides an apparatus for adjusting a working frequency of a VRD by detecting temperature. The apparatus includes a temperature control module, a load module and a controller. The temperature control module is used for detecting a temperature of a CPU, and judging an output load state of the VRD according to the detected temperature of the CPU, so as to output a control signal according the output load state. The load module is connected to the VRD, and is used for providing an external resistance to the VRD. The controller is respectively coupled to the load module and the temperature control module, and is used for receiving the control signal and adjusting a resistance of the load module according to the received control signal, so as to adjust a working frequency of the VRD. A power consumption of the VRD may be reduced based on the present invention.