Computer system
    31.
    发明授权
    Computer system 有权
    电脑系统

    公开(公告)号:US08190929B2

    公开(公告)日:2012-05-29

    申请号:US12401108

    申请日:2009-03-10

    IPC分类号: G06F1/00

    CPC分类号: G06F1/3203 G06F1/26

    摘要: A computer system including a power supply and N main boards is provided, herein N is an integer greater than 1. The power supply generates a main power and a standby power. The N main boards respectively correspond to one standby voltage. The 1st to the (N−1)th main boards respectively generate the corresponding standby voltage by the main power in a power-on state, and respectively generate the corresponding standby voltage by the standby power in a power-off state. The Nth main board generates the corresponding standby voltage by the main power in the power-on and power-off state.

    摘要翻译: 提供了包括电源和N个主板的计算机系统,其中N是大于1的整数。电源产生主电源和待机电源。 N个主板分别对应一个待机电压。 第(N-1)个主板的第一至第二主板分别通过主电源在通电状态下产生相应的备用电压,并分别在断电状态下通过待机电源产生相应的待机电压。 第N个主板在上电和断电状态下通过主电源产生相应的待机电压。

    Apparatus for resolving conflicts happened between two I2C slave devices with the same addressed address in computer system
    32.
    发明授权
    Apparatus for resolving conflicts happened between two I2C slave devices with the same addressed address in computer system 有权
    用于解决冲突的装置发生在计算机系统中具有相同寻址地址的两个I2C从器件之间

    公开(公告)号:US07849244B2

    公开(公告)日:2010-12-07

    申请号:US12330812

    申请日:2008-12-09

    IPC分类号: G06F13/40

    CPC分类号: G06F13/4291

    摘要: An apparatus for resolving conflicts happened between two I2C slave devices with the same addressed address is provided. The apparatus is composed by all cheap electronic devices, so as to achieve a purpose of lowering a cost for design. In addition, in the apparatus for resolving conflicts happened between two I2C slave devices with the same addressed address of the invention, all the I2C slave devices are addressed by an I2C master device to perform the data transmission subsequently before a basic input/output system (BIOS) completes a power-on self-test (POST), but all the I2C slave devices are addressed by a system chip (for example, a baseboard management controller (BMC)) to perform the data transmission subsequently after the BIOS completes the POST. Therefore, the purpose of performing the data transmission for all the I2C slave devices on real time is achieved.

    摘要翻译: 提供了两个具有相同寻址地址的I2C从器件之间发生冲突的设备。 该设备由所有便宜的电子设备组成,以达到降低设计成本的目的。 另外,在用于解决本发明具有相同寻址地址的两个I2C从器件之间发生冲突的装置中,所有I2C从器件都由I2C主器件寻址,以便在基本输入/输出系统之前执行数据传输( BIOS)完成了开机自检(POST),但是所有I2C从器件都由系统芯片(例如,基板管理控制器(BMC))寻址,以便在BIOS完成POST之后执行数据传输 。 因此,实现了对所有I2C从器件实时数据传输的目的。

    Computer capable of automatic bandwidth configuration according to I/O expansion card type
    33.
    发明授权
    Computer capable of automatic bandwidth configuration according to I/O expansion card type 有权
    计算机能够根据I / O扩展卡类型进行自动带宽配置

    公开(公告)号:US07783816B2

    公开(公告)日:2010-08-24

    申请号:US12328486

    申请日:2008-12-04

    IPC分类号: G06F13/40

    CPC分类号: G06F13/385

    摘要: A computer capable of automatic bandwidth configuration according to I/O expansion card (e.g., PCI-Express expansion card) type is provided. A motherboard of the computer includes an I/O expansion slot, a chipset, and a configuration setting circuit. When the I/O expansion slot supports different types of I/O expansion cards having multiple interface card slot combinations, a corresponding bandwidth configuration message is generated on the I/O expansion card. The bandwidth configuration message is used to indicate the type of the I/O expansion card that is being used and thereby control the configuration setting circuit to adjust the bandwidth configuration in the chipset.

    摘要翻译: 提供了能够根据I / O扩展卡(例如,PCI-Express扩展卡)类型进行自动带宽配置的计算机。 计算机的主板包括I / O扩展槽,芯片组和配置设置电路。 当I / O扩展槽支持具有多个接口卡槽组合的不同类型的I / O扩展卡时,I / O扩展卡上将生成相应的带宽配置消息。 带宽配置消息用于指示正​​在使用的I / O扩展卡的类型,从而控制配置设置电路以调整芯片组中的带宽配置。

    POWER CONVERTING DEVICE
    34.
    发明申请
    POWER CONVERTING DEVICE 有权
    电源转换器件

    公开(公告)号:US20100207593A1

    公开(公告)日:2010-08-19

    申请号:US12416618

    申请日:2009-04-01

    IPC分类号: G05F1/10

    摘要: A power converting device including a pulse width modulation circuit, a switch unit, a power output unit and a voltage start unit is provided. The pulse width modulation circuit increases a start voltage in a soft start mode and is operated under the start voltage to generate a pulse width modulation signal. The switch unit is for receiving an input voltage, and forming a charge path and a discharge path alternately according to the pulse width modulation signal. The power output unit converts the input voltage to a core voltage in accordance with the charge path and the discharge path. The voltage start unit is for detecting the start voltage, and for transmitting a control signal to interrupt the formation of the discharge path when the start voltage is smaller than the core voltage.

    摘要翻译: 提供了包括脉宽调制电路,开关单元,电力输出单元和电压启动单元的电力转换装置。 脉宽调制电路在软启动模式下增加启动电压,并在启动电压下工作,产生脉宽调制信号。 开关单元用于接收输入电压,并且根据脉冲宽度调制信号交替地形成充电路径和放电路径。 功率输出单元根据充电路径和放电路径将输入电压转换为核心电压。 电压启动单元用于检测启动电压,并且用于在起动电压小于铁芯电压时发送用于中断形成放电路径的控制信号。

    Structure compatible with I2C bus and system management bus and timing buffering apparatus thereof
    35.
    发明授权
    Structure compatible with I2C bus and system management bus and timing buffering apparatus thereof 失效
    与I2C总线和系统管理总线及其定时缓冲装置兼容的结构

    公开(公告)号:US07752377B2

    公开(公告)日:2010-07-06

    申请号:US12015378

    申请日:2008-01-16

    IPC分类号: G06F13/36

    CPC分类号: G06F13/4291

    摘要: A structure compatible with I2C bus and system management (SM) bus is provided. The structure includes a first device having an I2C bus interface, a second device having a SM bus interface, and a timing buffering apparatus connected between the I2C bus interface and the SM bus interface. The timing buffering apparatus provides a time delay when the first device sends data to the second device so as to meet the requirement of the second device to data holding time.

    摘要翻译: 提供与I2C总线和系统管理(SM)总线兼容的结构。 该结构包括具有I2C总线接口的第一设备,具有SM总线接口的第二设备以及连接在I2C总线接口和SM总线接口之间的定时缓冲设备。 当第一设备向第二设备发送数据以便满足第二设备对数据保持时间的要求时,定时缓冲设备提供时间延迟。

    Power factor correction circuit and power supply apparatus thereof
    36.
    发明授权
    Power factor correction circuit and power supply apparatus thereof 有权
    功率因数校正电路及其电源装置

    公开(公告)号:US07728570B2

    公开(公告)日:2010-06-01

    申请号:US12110892

    申请日:2008-04-28

    IPC分类号: G05F1/70 G05F1/614

    摘要: A power factor correction circuit including a boost converter, a first capacitor, a first resistor, and a boost control unit is provided. The boost control unit includes a signal generator and a frequency controller. The boost converter transforms a rectified voltage to a correction voltage according to a pulse width modulation (PWM) signal. The first capacitor and the first resistor are coupled between an input terminal and a ground terminal of the boost converter. The boost control unit is adapted to generate the PWM signal, and adjust a duty cycle and a frequency of the PWM signal according to a current flowing through the first resistance, the rectified voltage and the correction voltage. Wherein, the signal generator is adapted to generate a ramp signal and adjust a slope of the ramp signal according to a charging current. The frequency controller adjusts the charging current according to the rectified voltage.

    摘要翻译: 提供了包括升压转换器,第一电容器,第一电阻器和升压控制单元的功率因数校正电路。 升压控制单元包括信号发生器和频率控制器。 升压转换器根据脉宽调制(PWM)信号将整流电压转换为校正电压。 第一电容器和第一电阻器耦合在升压转换器的输入端子和接地端子之间。 升压控制单元适于产生PWM信号,并且根据流过第一电阻,整流电压和校正电压的电流来调整PWM信号的占空比和频率。 其中,信号发生器适于产生斜坡信号,并根据充电电流调整斜坡信号的斜率。 频率控制器根据整流电压调节充电电流。

    COMPUTER SYSTEM
    37.
    发明申请
    COMPUTER SYSTEM 有权
    电脑系统

    公开(公告)号:US20100131779A1

    公开(公告)日:2010-05-27

    申请号:US12401122

    申请日:2009-03-10

    IPC分类号: G06F1/26

    CPC分类号: G06F1/26 G06F1/3203

    摘要: A computer system including a first and second main boards, a judgment unit, a power supply, a first switch and second switch is provided. The judgment unit receives a first and second power start signals from the first and second main boards, and outputs a total power start signal. The power supply outputs a power reply signal according to the total power start signal. The first and second switches determine whether to output a power good signal individually according to the first and second power start signals. When one of the first and second power start signals is available, the total power start signal and the power reply signal are available, and the power supply outputs an operating voltage. When the first and second power start signals are unavailable, the total power start signal and the power reply signal are unavailable, and the power supply stops outputting the operating voltage.

    摘要翻译: 提供包括第一和第二主板,判断单元,电源,第一开关和第二开关的计算机系统。 判断单元从第一和第二主板接收第一和第二电源启动信号,并输出总功率开始信号。 电源根据总功率启动信号输出功率回复信号。 第一和第二开关确定是否根据第一和第二功率启动信号分别输出功率良好信号。 当第一和第二电源启动信号之一可用时,总功率开始信号和功率应答信号可用,并且电源输出工作电压。 当第一和第二电源启动信号不可用时,总功率开始信号和功率应答信号不可用,并且电源停止输出工作电压。

    COMPUTER CAPABLE OF AUTOMATIC BANDWIDTH CONFIGURATION ACCORDING TO I/O EXPANSION CARD TYPE
    38.
    发明申请
    COMPUTER CAPABLE OF AUTOMATIC BANDWIDTH CONFIGURATION ACCORDING TO I/O EXPANSION CARD TYPE 有权
    符合I / O扩展卡类型的自动带宽配置的计算机

    公开(公告)号:US20100100657A1

    公开(公告)日:2010-04-22

    申请号:US12328486

    申请日:2008-12-04

    IPC分类号: G06F13/00

    CPC分类号: G06F13/385

    摘要: A computer capable of automatic bandwidth configuration according to I/O expansion card (e.g., PCI-Express expansion card) type is provided. A motherboard of the computer includes an I/O expansion slot, a chipset, and a configuration setting circuit. When the I/O expansion slot supports different types of I/O expansion cards having multiple interface card slot combinations, a corresponding bandwidth configuration message is generated on the I/O expansion card. The bandwidth configuration message is used to indicate the type of the I/O expansion card that is being used and thereby control the configuration setting circuit to adjust the bandwidth configuration in the chipset.

    摘要翻译: 提供了能够根据I / O扩展卡(例如,PCI-Express扩展卡)类型进行自动带宽配置的计算机。 计算机的主板包括I / O扩展槽,芯片组和配置设置电路。 当I / O扩展槽支持具有多个接口卡槽组合的不同类型的I / O扩展卡时,I / O扩展卡上将生成相应的带宽配置消息。 带宽配置消息用于指示正​​在使用的I / O扩展卡的类型,从而控制配置设置电路以调整芯片组中的带宽配置。

    Power discharge control system
    39.
    发明申请
    Power discharge control system 有权
    放电控制系统

    公开(公告)号:US20090284081A1

    公开(公告)日:2009-11-19

    申请号:US12220778

    申请日:2008-07-28

    IPC分类号: G05F1/10

    CPC分类号: H05K9/0067

    摘要: A power discharge control system for eliminating residual voltage of electronic components in an electronic device, is proposed, which includes a control IC for outputting first electrical signals of a first level and a second level respectively corresponding to power on and power off of the electronic device; a power supply for receiving the first electrical signal, and providing or terminating operation power to the electronic component accordingly, and delaying outputting of a second electrical signal equivalent to the first electrical signal level; a logic judgment module connected to the control IC and the power supply for receiving the first and the second electrical signals for executing logic operation process, when at least one of the first and the second electrical signals is at the first level, a third electrical signal of a third level is outputted, when both the first and the second electrical signals are at the second level, a third electrical signal of a fourth level is outputted; and at least a discharge module for receiving the third electrical signal, when the third electrical signal is at the third level, the discharge process is skipped, when the third electrical signal is at the fourth level, the discharge process is executed.

    摘要翻译: 提出了一种用于消除电子设备中的电子部件的残余电压的放电控制系统,其包括用于分别输出对应于电子设备的通电和断电的第一电平和第二电平的第一电信号的控制IC ; 电源,用于接收第一电信号,并相应地向电子组件提供或终止操作电力,并延迟输出等效于第一电信号电平的第二电信号; 连接到控制IC的逻辑判断模块和用于在第一和第二电信号中的至少一个处于第一电平时接收用于执行逻辑运算处理的第一和第二电信号的电源,第三电信号 当第一和第二电信号均处于第二电平时,输出第三电平的第三电平的第三电信号; 以及至少一个用于接收第三电信号的放电模块,当第三电信号处于第三电平时,跳过放电过程,当第三电信号处于第四电平时,执行放电处理。

    APPARATUS AND METHOD FOR ADJUSTING WORKING FREQUENCY OF VRD BY DETECTING TEMPERATURE
    40.
    发明申请
    APPARATUS AND METHOD FOR ADJUSTING WORKING FREQUENCY OF VRD BY DETECTING TEMPERATURE 审中-公开
    通过检测温度调节VRD工作频率的装置和方法

    公开(公告)号:US20090128222A1

    公开(公告)日:2009-05-21

    申请号:US12016427

    申请日:2008-01-18

    申请人: Li Zeng Shih-Hao Liu

    发明人: Li Zeng Shih-Hao Liu

    IPC分类号: H01L35/00 G05F1/10 H03B19/00

    CPC分类号: G06F1/206 G06F1/32 Y02D10/16

    摘要: The invention provides an apparatus for adjusting a working frequency of a VRD by detecting temperature. The apparatus includes a temperature control module, a load module and a controller. The temperature control module is used for detecting a temperature of a CPU, and judging an output load state of the VRD according to the detected temperature of the CPU, so as to output a control signal according the output load state. The load module is connected to the VRD, and is used for providing an external resistance to the VRD. The controller is respectively coupled to the load module and the temperature control module, and is used for receiving the control signal and adjusting a resistance of the load module according to the received control signal, so as to adjust a working frequency of the VRD. A power consumption of the VRD may be reduced based on the present invention.

    摘要翻译: 本发明提供一种通过检测温度来调节VRD的工作频率的装置。 该装置包括温度控制模块,负载模块和控制器。 温度控制模块用于检测CPU的温度,并且根据检测到的CPU的温度判断VRD的输出负载状态,以便根据输出负载状态输出控制信号。 负载模块连接到VRD,用于为VRD提供外部电阻。 控制器分别耦合到负载模块和温度控制模块,用于接收控制信号,并根据接收到的控制信号调整负载模块的电阻,以调整VRD的工作频率。 基于本发明可以减少VRD的功耗。