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公开(公告)号：US11099591B1
公开(公告)日：2021-08-24
申请号：US16567858
申请日：2019-09-11
摘要： A DLDO has a configuration that mitigates performance degradation associated with limit cycle oscillation (LCO). The DLDO comprises a clocked comparator, an array of power transistors, a digital controller and a clock pulsewidth reduction circuit. The digital controller comprises control logic configured to generate control signals that cause the power transistors to be turned ON or OFF in accordance with a preselected activation/deactivation control scheme. The clock pulsewidth reduction circuit receives an input clock signal having a first pulsewidth and generates the DLDO clock signal having the preselected pulsewidth that is narrower that the first pulsewidth, which is then delivered to the clock terminals of the clocked comparator and the digital controller. The narrower pulsewidth of the DLDO clock reduces the LCO mode to mitigate performance degradation caused by LCO.
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公开(公告)号：US20180246556A1
公开(公告)日：2018-08-30
申请号：US15706135
申请日：2017-09-15
发明人： Alfio Pasqua , Salvatore Tumminaro
CPC分类号： G06F1/30 , G05F1/614 , G06F1/24 , H02J7/0052 , H02J7/0068 , H02J9/061 , H02J9/062 , H02J2007/0059 , H02M3/156 , H02M3/33507
摘要： A control circuit for switched power supplies, for example for battery chargers, including a driving comparator of the generator of the primary current peaks generated by a power transistor that drives a load via a transformer. The aforementioned driving comparator has comparison inputs coupled to an amperometric sensor and to a circuit for determining the value of the aforementioned primary current peaks, for which the voltage applied to the load is a function of the value of the primary current peaks. The determination circuit is coupled to at least one feedback comparator and configured to regulate the value of the primary current peaks, thereby regulating the voltage applied to the load keeping the mean frequency, of the peaks close to the oscillation frequency of the clock that drives the generator.
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3.发明授权Power supply device including an electro-conductive cable wound around an output capacitor 有权电源装置包括缠绕在输出电容器上的导电电缆公开(公告)号：US09563214B2
公开(公告)日：2017-02-07
申请号：US14494744
申请日：2014-09-24
申请人： Rohm Co., Ltd.
发明人： Hironori Sumitomo
IPC分类号： G05F1/00 , G05F1/575 , H02M3/156 , H02M1/00 , G05F1/567 , G05F1/46 , G05F1/61 , H02M3/155 , G05F1/565 , G05F1/563 , G05F1/614 , G05F1/56
CPC分类号： G05F1/575 , G05F1/462 , G05F1/468 , G05F1/562 , G05F1/563 , G05F1/565 , G05F1/567 , G05F1/61 , G05F1/614 , H02M3/155 , H02M3/156 , H02M2001/0009 , H02M2001/0045 , H02M2001/007
摘要： A power supply device has an output portion that generates an output voltage from an input voltage and supplies the output voltage to a load, an output feedback controller that drives the output portion by performing output feedback control, and a first detector that detects, by means of an electromagnetic induction method, a change in a first monitoring target current due to a load change. The output feedback controller reflects a detection result from the first detector into the output feedback control.
摘要翻译： 电源装置具有从输入电压产生输出电压并将输出电压提供给负载的输出部分，通过执行输出反馈控制来驱动输出部分的输出反馈控制器，以及通过装置检测输出部分的第一检测器 的电磁感应方法，由于负载变化引起的第一监视目标电流的变化。 输出反馈控制器将来自第一检测器的检测结果反映到输出反馈控制中。
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4.发明授权公开(公告)号：US08922271B1
公开(公告)日：2014-12-30
申请号：US13953669
申请日：2013-07-29
申请人： Micrel, Inc.
发明人： Rajesh Moothedath , Douglas Falco
CPC分类号： G01R31/31924
摘要： A voltage-current conversion circuit for automatic test equipment (ATE) or a tester converts a low voltage, low current output from a power supply of the tester to a high voltage and/or high current output to be coupled to a device under test (DUT) while maintaining the sense capability of the tester power supply. In some embodiments, the voltage-current conversion circuit is implemented as a current only conversion circuit.
摘要翻译： 用于自动测试设备（ATE）或测试仪器的电压 - 电流转换电路将来自测试仪器的电源的低电压，低电流输出转换为高电压和/或高电流输出以耦合到被测器件（ DUT），同时保持测试仪电源的感测能力。 在一些实施例中，电压 - 电流转换电路被实现为仅电流转换电路。
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5.发明授权Power regulator having a voltage regulator module and having a voltage buffer module to provide a constant voltage output 失效功率调节器具有电压调节器模块并具有电压缓冲器模块以提供恒定电压输出公开(公告)号：US07579813B2
公开(公告)日：2009-08-25
申请号：US11698888
申请日：2007-01-29
申请人： Cheng-Shun Fan
发明人： Cheng-Shun Fan
IPC分类号： G05F1/614
CPC分类号： G05F5/00
摘要： A power regulator with a constant-voltage output is provided, which includes a voltage regulator module and a voltage buffer module, wherein the voltage regulator module is spaced from a load by the voltage buffer module, so that an output voltage of the voltage regulator module is not affected by the current of the load, thereby enhancing the output precision of the power regulator.
摘要翻译： 提供具有恒定电压输出的功率调节器，其包括电压调节器模块和电压缓冲器模块，其中所述电压调节器模块通过所述电压缓冲器模块与负载间隔开，使得所述电压调节器模块的输出电压 不受负载电流的影响，从而提高功率调节器的输出精度。
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公开(公告)号：US06856163B2
公开(公告)日：2005-02-15
申请号：US10271664
申请日：2002-10-15
申请人： Sehat Sutardja
发明人： Sehat Sutardja
CPC分类号： G06F13/4086 , G05F1/614 , Y02D10/14 , Y02D10/151
摘要： An interconnect circuit for communicating data. The interconnect circuit including at least one driver to receive and transmit data. At least one termination device in communication with each driver. A first power supply having an output to supply power to the driver. A second power supply having an output to supply power to the termination device. A first decoupling capacitor in communication with the first power supply output and the second power supply output.
摘要翻译： 用于传送数据的互连电路。 所述互连电路包括用于接收和发送数据的至少一个驱动器。 与每个驾驶员通信的至少一个终端设备。 具有向驱动器供电的输出的第一电源。 第二电源具有输出以向终端装置供电。 与第一电源输出和第二电源输出通信的第一去耦电容器。
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公开(公告)号：US11994890B2
公开(公告)日：2024-05-28
申请号：US17505006
申请日：2021-10-19
摘要： The present disclosure describes a device for determining information regarding a connection of a circuit component that is connected to an output of a regulator in order to reduce fluctuations of an output signal at the output of the regulator. The device includes a processing unit that is configured to generate a statistical value that is a measure of fluctuations of the measurement signals, and thus of the output signal at the output of the regulator, based on a plurality of measurement signals, each of which has information regarding the output signal of the regulator and is recorded while a load component generates an electrical load at the output of the regulator. The processing unit is configured to compare the statistical value with a limit value and to determine the information regarding the connection of the circuit component based on the result of the comparison.
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公开(公告)号：US11573586B2
公开(公告)日：2023-02-07
申请号：US17410896
申请日：2021-08-24
摘要： A DLDO has a configuration that mitigates performance degradation associated with limit cycle oscillation (LCO). The DLDO comprises a clocked comparator, an array of power transistors, a digital controller and a clock pulsewidth reduction circuit. The digital controller comprises control logic configured to generate control signals that cause the power transistors to be turned ON or OFF in accordance with a preselected activation/deactivation control scheme. The clock pulsewidth reduction circuit receives an input clock signal having a first pulsewidth and generates the DLDO clock signal having the preselected pulsewidth that is narrower that the first pulsewidth, which is then delivered to the clock terminals of the clocked comparator and the digital controller. The narrower pulsewidth of the DLDO clock reduces the LCO mode to mitigate performance degradation caused by LCO.
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公开(公告)号：US20190250657A1
公开(公告)日：2019-08-15
申请号：US16135977
申请日：2018-09-19
申请人： NVIDIA Corp.
发明人： Sudhir Kudva , John Wilson
摘要： High-resolution switched digital regulators are disclosed having fast cross corner and variable temperature response, with constrained ripple. The strength of the power transistors utilized by the regulator are adjusted to control the current delivered to the load. The regulators utilize a slow control loop in parallel with a primary fast switching loop. The slow loop uses the switching signal of the primary loop to estimate the load current and set the power transistor size accordingly.
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公开(公告)号：US09543839B2
公开(公告)日：2017-01-10
申请号：US14853048
申请日：2015-09-14
发明人： Xiaoyi Jin , Zhihong Ye , Dong Xiang
CPC分类号： H02M3/158 , G05F1/614 , H02M3/07 , H02M3/156 , H02M2001/0096
摘要： A voltage stabilizing circuit includes an input capacitor, a booster circuit having an input side coupled across the input capacitor, a first output capacitor coupled to an output side of the booster circuit, and a series connection of a first power switch and a second output capacitor coupled between two terminals of the first output capacitor. The first power switch has a terminal coupled to one terminal of the first output capacitor. The second output capacitor has a first terminal coupled to the other terminal of the first power switch at a common node, and a second terminal coupled to the other terminal of the first output capacitor. A second power switch is coupled between the input capacitor and the common node.
摘要翻译： 电压稳定电路包括输入电容器，具有耦合到输入电容器两端的输入端的升压电路，耦合到升压电路的输出侧的第一输出电容器和第一电源开关和第二输出电容器的串联连接 耦合在第一输出电容器的两个端子之间。 第一电源开关具有耦合到第一输出电容器的一个端子的端子。 第二输出电容器具有在公共节点处耦合到第一功率开关的另一端的第一端子，以及耦合到第一输出电容器的另一端的第二端子。 第二电源开关耦合在输入电容器和公共节点之间。
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