Accelerating and offloading lock access over a network

    公开(公告)号:US09699110B2

    公开(公告)日:2017-07-04

    申请号:US14753159

    申请日:2015-06-29

    摘要: Lock access is managed in a data network having an initiator node and a remote target by issuing a lock command from a first process to the remote target via an initiator network interface controller to establish a lock on a memory location, and prior to receiving a reply to the lock command communicating a data access request to the memory location from the initiator network interface controller. Prior to receiving a reply to the data access request, an unlock command issues from the initiator network interface controller. The target network interface controller determines the lock content, and when permitted by the lock accesses the memory location. After accessing the memory location the target network interface controller executes the unlock command. When the lock prevents data access, the lock operation is retried a configurable number of times until data access is allowed or a threshold is exceeded.

    Network-based computational accelerator
    32.
    发明申请
    Network-based computational accelerator 审中-公开
    基于网络的计算加速器

    公开(公告)号:US20160330112A1

    公开(公告)日:2016-11-10

    申请号:US15145983

    申请日:2016-05-04

    摘要: A data processing device includes a first packet communication interface for communication with at least one host processor via a network interface controller (NIC) and a second packet communication interface for communication with a packet data network. A memory holds a flow state table containing context information with respect to multiple packet flows conveyed between the host processor and the network via the first and second interfaces packet communication interfaces. Acceleration logic, coupled between the first and second packet communication interfaces, performs computational operations on payloads of packets in the multiple packet flows using the context information in the flow state table.

    摘要翻译: 数据处理设备包括用于经由网络接口​​控制器(NIC)与至少一个主机处理器通信的第一分组通信接口和用于与分组数据网络通信的第二分组通信接口。 存储器保持流状态表,其包含关于经由第一和第二接口分组通信接口在主处理器和网络之间传送的多个分组流的上下文信息。 耦合在第一和第二分组通信接口之间的加速逻辑使用流状态表中的上下文信息对多个分组流中的分组的有效载荷执行计算操作。

    ACCELERATING AND OFFLOADING LOCK ACCESS OVER A NETWORK
    33.
    发明申请
    ACCELERATING AND OFFLOADING LOCK ACCESS OVER A NETWORK 有权
    通过网络加速和卸载锁定访问

    公开(公告)号:US20160043965A1

    公开(公告)日:2016-02-11

    申请号:US14753159

    申请日:2015-06-29

    摘要: Lock access is managed in a data network having an initiator node and a remote target by issuing a lock command from a first process to the remote target via an initiator network interface controller to establish a lock on a memory location, and prior to receiving a reply to the lock command communicating a data access request to the memory location from the initiator network interface controller. Prior to receiving a reply to the data access request, an unlock command issues from the initiator network interface controller. The target network interface controller determines the lock content, and when permitted by the lock accesses the memory location. After accessing the memory location the target network interface controller executes the unlock command. When the lock prevents data access, the lock operation is retried a configurable number of times until data access is allowed or a threshold is exceeded.

    摘要翻译: 在具有发起者节点和远程目标的数据网络中通过经由发起者网络接口控制器向远程目标发出锁定命令来向远程目标发出锁定访问,以在存储器位置上建立锁定,并且在接收到回复之前 该锁定命令从发起者网络接口控制器向存储器位置传送数据访问请求。 在接收到数据访问请求的答复之前,解锁命令从发起者网络接口控制器发出。 目标网络接口控制器确定锁定内容,并且当锁定允许访问存储器位置时。 访问内存位置后,目标网络接口控制器执行unlock命令。 当锁定阻止数据访问时,重试锁定操作可配置次数,直到允许数据访问或超过阈值。

    PERIPHERAL DEVICE ASSISTANCE IN REDUCING CPU POWER CONSUMPTION
    34.
    发明申请
    PERIPHERAL DEVICE ASSISTANCE IN REDUCING CPU POWER CONSUMPTION 审中-公开
    外围设备协助降低CPU功耗

    公开(公告)号:US20150370309A1

    公开(公告)日:2015-12-24

    申请号:US14745549

    申请日:2015-06-22

    IPC分类号: G06F1/32

    CPC分类号: G06F1/3209

    摘要: A method for processing data includes receiving in a peripheral device, which is connected by a bus to a host processor having multiple host resources, information regarding respective power states of the host resources. The data are selectively directed from the peripheral device to the host resources responsively to the respective power states.

    摘要翻译: 一种用于处理数据的方法包括在通过总线连接到具有多个主机资源的主机处理器的外围设备中接收关于主机资源的各自的电力状态的信息。 响应于各自的功率状态,数据被选择性地从外围设备引导到主机资源。

    STORAGE SYSTEM AND SERVER
    35.
    发明申请
    STORAGE SYSTEM AND SERVER 有权
    存储系统和服务器

    公开(公告)号:US20150261434A1

    公开(公告)日:2015-09-17

    申请号:US14215099

    申请日:2014-03-17

    IPC分类号: G06F3/06 H04L29/08

    摘要: A data storage system includes a storage server, including non-volatile memory (NVM) and a server network interface controller (NIC), which couples the storage server to a network. A host computer includes a host central processing unit (CPU), a host memory and a host NIC, which couples the host computer to the network. The host computer runs a driver program that is configured to receive, from processes running on the host computer, commands in accordance with a protocol defined for accessing local storage devices connected to a peripheral component interface bus of the host computer, and upon receiving a storage access command in accordance with the protocol, to initiate a remote direct memory access (RDMA) operation to be performed by the host and server NICs so as to execute on the storage server, via the network, a storage transaction specified by the command.

    摘要翻译: 数据存储系统包括存储服务器,其包括非易失性存储器(NVM)和将存储服务器耦合到网络的服务器网络接口控制器(NIC)。 主计算机包括主机中央处理单元(CPU),主机存储器和主机NIC,其将主计算机耦合到网络。 主计算机运行驱动程序,其被配置为从主机计算机上运行的进程接收根据为访问连接到主计算机的外围组件接口总线的本地存储设备而定义的协议的命令,以及在接收到存储器 访问命令,以启动由主机和服务器NIC执行的远程直接存储器访问(RDMA)操作,以便经由网络在存储服务器上执行由该命令指定的存储事务。

    Direct IO access from a CPU's instruction stream
    36.
    发明申请
    Direct IO access from a CPU's instruction stream 有权
    从CPU的指令流直接访问IO

    公开(公告)号:US20150212817A1

    公开(公告)日:2015-07-30

    申请号:US14608252

    申请日:2015-01-29

    IPC分类号: G06F9/30 G06F11/22 G06F11/36

    摘要: A method for network access of remote memory directly from a local instruction stream using conventional loads and stores. In cases where network IO access (a network phase) cannot overlap a compute phase, a direct network access from the instruction stream greatly decreases latency in CPU processing. The network is treated as yet another memory that can be directly read from, or written to, by the CPU. Network access can be done directly from the instruction stream using regular loads and stores. Example scenarios where synchronous network access can be beneficial are SHMEM (symmetric hierarchical memory access) usages (where the program directly reads/writes remote memory), and scenarios where part of system memory (for example DDR) can reside over a network and made accessible by demand to different CPUs.

    摘要翻译: 一种使用常规负载和存储直接从本地指令流网络访问远程存储器的方法。 在网络IO访问(网络阶段)不能与计算阶段重叠的情况下,来自指令流的直接网络访问大大降低了CPU处理中的延迟。 该网络被视为可以直接从CPU读取或写入的另一个存储器。 网络访问可以直接从指令流使用常规的负载和存储。 同步网络访问可能有益的示例场景是SHMEM(对称分层存储器访问)用途(程序直接读/写远程内存的位置)以及系统内存(例如DDR)的一部分可以驻留在网络上并使其可访问的情况 通过需求到不同的CPU。