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    Methods for reducing heat transfer in semiconductor assemblies, and associated systems and devices
    32.
    发明授权
    Methods for reducing heat transfer in semiconductor assemblies, and associated systems and devices 有权

    公开(公告)号：US11189609B2

    公开(公告)日：2021-11-30

    申请号：US16864873

    申请日：2020-05-01

    Applicant: Micron Technology, Inc.

    Inventor： Brandon P. Wirz ,  Andrew M. Bayless

    IPC: H01L25/00 ,  H01L21/56 ,  H01L23/00 ,  H01L25/065

    Abstract: Methods for reducing heat transfer in semiconductor devices, and associated systems and devices, are described herein. In some embodiments, a method of manufacturing a semiconductor device includes forming a channel in a region of a substrate between a first die stack and a second die stack. The first die stack includes a plurality of first dies attached to each other by first film layers and the second die stack includes a plurality of second dies attached to each other by second film layers. The channel extends entirely through a thickness of the substrate. The method also includes applying heat to the first die stack to cure the first film layers. The channel reduces heat transfer from the first die stack to the second die stack.

    Methods and systems for manufacturing semiconductor devices
    35.
    发明授权
    Methods and systems for manufacturing semiconductor devices 有权

    公开(公告)号：US10971471B2

    公开(公告)日：2021-04-06

    申请号：US16236441

    申请日：2018-12-29

    Applicant: Micron Technology, Inc.

    Inventor： Andrew M. Bayless ,  Cassie L. Bayless

    IPC: H01L23/00

    Abstract: A semiconductor manufacturing system comprises a laser and a heated bond tip and is configured to bond a die stack in a semiconductor assembly. The semiconductor assembly includes a wafer, manufacture from a material that is optically transparent to a beam emitted by the laser and configured to support a die stack comprising a plurality of semiconductor dies. A metal film is deposited on the wafer and heatable by the beam emitted by the laser. The heated bond tip applies heat and pressure to the die stack, compressing the die stack between the heated bond tip and the metal film and thermally bonding dies in the stack by heat emitted by the heated bond tip and the metal film when the metal film is heated by the beam emitted from the laser.

    Carrier Removal By Use of Multilayer Foil
    36.
    发明申请
    Carrier Removal By Use of Multilayer Foil 审中-公开

    公开(公告)号：US20190341325A1

    公开(公告)日：2019-11-07

    申请号：US16431988

    申请日：2019-06-05

    Applicant: Micron Technology, Inc.

    Inventor： James M. Derderian ,  Andrew M. Bayless ,  Xiao Li

    IPC: H01L23/367 ,  H01L23/532 ,  H01L23/498

    Abstract: A semiconductor device assembly having a semiconductor device attached to a substrate with a foil layer on a surface of the substrate. A layer of adhesive connects the substrate to a first surface of the semiconductor device. The semiconductor device assembly enables processing on the second surface of the semiconductor device. An energy pulse may be applied to the foil layer causing an exothermic reaction to the foil layer that releases the substrate from the semiconductor device. The semiconductor device assembly may include a release layer positioned between the foil layer and the layer of adhesive that connects the substrate to the semiconductor device. The heat generated by the exothermic reaction breaks down the release layer to release the substrate from the semiconductor device. The energy pulse may be an electric charge, a heat pulse, or may be applied from a laser.

    Carrier removal by use of multilayer foil
    37.
    发明授权
    Carrier removal by use of multilayer foil 有权

    公开(公告)号：US10431519B1

    公开(公告)日：2019-10-01

    申请号：US15969978

    申请日：2018-05-03

    Applicant: Micron Technology, Inc.

    Inventor： James M. Derderian ,  Andrew M. Bayless ,  Xiao Li

    IPC: H01L23/00 ,  H01L23/367 ,  H01L23/532 ,  H01L23/498 ,  B32B43/00 ,  B32B7/12

    Abstract: A semiconductor device assembly having a semiconductor device attached to a substrate with a foil layer on a surface of the substrate. A layer of adhesive connects the substrate to a first surface of the semiconductor device. The semiconductor device assembly enables processing on the second surface of the semiconductor device. An energy pulse may be applied to the foil layer causing an exothermic reaction to the foil layer that releases the substrate from the semiconductor device. The semiconductor device assembly may include a release layer positioned between the foil layer and the layer of adhesive that connects the substrate to the semiconductor device. The heat generated by the exothermic reaction breaks down the release layer to release the substrate from the semiconductor device. The energy pulse may be an electric charge, a heat pulse, or may be applied from a laser.

    SEMICONDUCTOR DEVICES WITH RECESSED PADS FOR DIE STACK INTERCONNECTIONS
    40.
    发明申请
    SEMICONDUCTOR DEVICES WITH RECESSED PADS FOR DIE STACK INTERCONNECTIONS 有权

    公开(公告)号：US20240429172A1

    公开(公告)日：2024-12-26

    申请号：US18827526

    申请日：2024-09-06

    Applicant: Micron Technology, Inc.

    Inventor： Ruei Ying Sheng ,  Andrew M. Bayless ,  Brandon P. Wirz

    IPC: H01L23/538 ,  H01L21/48 ,  H01L21/50 ,  H01L21/768 ,  H01L25/065

    Abstract: Semiconductor devices having electrical interconnections through vertically stacked semiconductor dies, and associated systems and methods, are disclosed herein. In some embodiments, a semiconductor assembly includes a die stack having a plurality of semiconductor dies. Each semiconductor die can include surfaces having an insulating material, a recess formed in at least one surface, and a conductive pad within the recess. The semiconductor dies can be directly coupled to each other via the insulating material. The semiconductor assembly can further include an interconnect structure electrically coupled to each of the semiconductor dies. The interconnect structure can include a monolithic via extending continuously through each of the semiconductor dies in the die stack. The interconnect structure can also include a plurality of protrusions extending from the monolithic via. Each protrusion can be positioned within the recess of a respective semiconductor die and can be electrically coupled to the conductive pad within the recess.

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