公开(公告)号：US20220066679A1

公开(公告)日：2022-03-03

申请号：US17004135

申请日：2020-08-27

Applicant: Micron Technology, Inc.

Inventor： Adam J. Hieb ,  Adam C. Guy ,  Sanjay Tiwari ,  Todd A. Marquart

IPC: G06F3/06 ,  G06F11/07

Abstract: A system includes a memory device and a processing device coupled to the memory device. The memory processing device can perform operations including receiving data indicative of occurrence of a plurality of events. The processing device can perform operations including determining an event log type for each of the plurality of events. The processing device can perform operations including storing an identifier associated with each of the determined event log types. The processing device can perform operations including updating a counter value associated with each identifier in response to occurrence of an event associated with the respective identifier.

公开(公告)号：US20220066642A1

公开(公告)日：2022-03-03

申请号：US17006978

申请日：2020-08-31

Applicant: Micron Technology, Inc.

Inventor： Kishore K. Muchherla ,  Niccolo' Righetti ,  Jeffrey S. McNeil Jr. ,  Akira Goda ,  Todd A. Marquart ,  Mark A. Helm ,  Gil Golov ,  Jeremy Binfet ,  Carmine Miccoli ,  Giuseppina Puzzilli

IPC: G06F3/06

Abstract: A method includes performing a copyback operation comprising transferring, using an internal processing device, user data and header data corresponding to the user data from a first block of memory in a memory device to a register in the memory device, decoupling the user data from the header data, performing an error correction code (ECC) operation on updated header data using an external processing device, transferring, via the external processing device, the updated header data to the register, and transferring the user data and the updated header data from the register to a second block of memory in the memory device.

公开(公告)号：US20190354421A1

公开(公告)日：2019-11-21

申请号：US15982653

申请日：2018-05-17

Applicant: Micron Technology, Inc.

Inventor： Kevin R. Brandt ,  William C. Filipiak ,  Michael G. McNeeley ,  Kishore K. Muchherla ,  Sampath K. Ratnam ,  Akira Goda ,  Todd A. Marquart

IPC: G06F11/07 ,  G11C29/10

Abstract: Performing a first set of scans on a memory device in a memory system with a first time interval between each scan of the first set of scans to detect errors on the memory device, determining, from performing the first set of scans, that a rate of errors being detected on the memory device is changing, and performing a second set of scans with a second time interval between each scan of the second set of scans to detect errors on the memory device, in response to determining that the rate of errors being detected on the memory device is changing, wherein the second time interval is different than the first time interval.

公开(公告)号：US08854892B2

公开(公告)日：2014-10-07

申请号：US13686487

申请日：2012-11-27

Applicant: Micron Technology, Inc.

Inventor： Todd A. Marquart

IPC: G11C11/34 ,  G11C16/34 ,  G11C16/04 ,  G11C11/56

CPC classification number: G11C11/34 ,  G11C11/5628 ,  G11C16/0483 ,  G11C16/349

Abstract: The present disclosure includes lifetime markers for memory devices. One or more embodiments include determining a read disturb value, a quantity of erase pulses, and/or a quantity of soft program pulses associated with a number of memory cells, and providing an indicator of an advance and/or retreat of the read disturb value, the quantity of erase pulses, and/or the quantity of soft program pulses relative to a lifetime marker associated with the memory cells.

Abstract translation: 本公开包括用于存储器件的寿命标记。 一个或多个实施例包括确定与多个存储器单元相关联的读取干扰值，擦除脉冲量和/或软编程脉冲的量，以及提供读取干扰值的提前和/或退避的指示符 ，擦除脉冲的数量和/或相对于与存储器单元相关联的寿命标记的软编程脉冲的数量。