MEMORY SUB-SYSTEM EVENT LOG MANAGEMENT

    公开(公告)号:US20220066679A1

    公开(公告)日:2022-03-03

    申请号:US17004135

    申请日:2020-08-27

    Abstract: A system includes a memory device and a processing device coupled to the memory device. The memory processing device can perform operations including receiving data indicative of occurrence of a plurality of events. The processing device can perform operations including determining an event log type for each of the plurality of events. The processing device can perform operations including storing an identifier associated with each of the determined event log types. The processing device can perform operations including updating a counter value associated with each identifier in response to occurrence of an event associated with the respective identifier.

    DATA ERASE OPERATIONS FOR A MEMORY SYSTEM
    4.
    发明申请

    公开(公告)号:US20190371409A1

    公开(公告)日:2019-12-05

    申请号:US15994151

    申请日:2018-05-31

    Abstract: A data erase operation is performed on the memory system. The directed data erase operation performed on the memory system erases blocks of the memory device including blocks that are indicated as not including user data. In some embodiments, a data erase operation may be performed on a memory system to erase those groups of memory cells (e.g., blocks) indicated as not including user data. In some embodiments, a data erase operation may be performed on a memory system to erase those groups of memory cells (e.g., blocks) indicated as valid without erasing those groups of memory cells (e.g., blocks) indicated as invalid. In some embodiments, a data erase operation that can be performed on a memory system may obtain information associated with failing scenes of groups of memory cells (e.g., blocks) prior to obtaining the information, and erase the blocks (e.g., invalid blocks) subsequently.

    MEMORY SUB-SYSTEM MANUFACTURING MODE

    公开(公告)号:US20220075741A1

    公开(公告)日:2022-03-10

    申请号:US17524814

    申请日:2021-11-12

    Inventor: Adam J. Hieb

    Abstract: A method includes enabling a manufacturing mode at least partially based on a first signal provided via one of a number of reserved pins of an interface connector. The method can further include providing, in response to enabling the manufacturing mode, a second signal to a memory component coupled to the interface connector via a number of other pins of the interface connector.

    DATA REDIRECTION UPON FAILURE OF A PROGRAM OPERATION

    公开(公告)号:US20220036963A1

    公开(公告)日:2022-02-03

    申请号:US17504778

    申请日:2021-10-19

    Inventor: Adam J. Hieb

    Abstract: A determination is made by a processing device included in a memory component that an operation to program data to a location in the memory component has failed, the data is programmed to a different location in the memory component by the processing device upon determining the operation has failed, and a notification that the data has been programmed to the different location in the memory component is provided by the processing device to a processing device operatively coupled to the memory component.

    Data redirection upon failure of a program operation

    公开(公告)号:US11158396B2

    公开(公告)日:2021-10-26

    申请号:US17091252

    申请日:2020-11-06

    Inventor: Adam J. Hieb

    Abstract: A determination is made by a processing device included in a memory component that an operation to program data to a location in the memory component has failed, the data is programmed to a different location in the memory component by the processing device upon determining the operation has failed, and a notification that the data has been programmed to the different location in the memory component is provided by the processing device to a processing device operatively coupled to the memory component.

    Data erase operations for a memory system

    公开(公告)号:US10854299B2

    公开(公告)日:2020-12-01

    申请号:US15994151

    申请日:2018-05-31

    Abstract: A data erase operation is performed on the memory system. The directed data erase operation performed on the memory system erases blocks of the memory device including blocks that are indicated as not including user data. In some embodiments, a data erase operation may be performed on a memory system to erase those groups of memory cells (e.g., blocks) indicated as not including user data. In some embodiments, a data erase operation may be performed on a memory system to erase those groups of memory cells (e.g., blocks) indicated as valid without erasing those groups of memory cells (e.g., blocks) indicated as invalid. In some embodiments, a data erase operation that can be performed on a memory system may obtain information associated with failing scenes of groups of memory cells (e.g., blocks) prior to obtaining the information, and erase the blocks (e.g., invalid blocks) subsequently.

Patent Agency Ranking