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公开(公告)号:US09703633B2
公开(公告)日:2017-07-11
申请号:US14848045
申请日:2015-09-08
Applicant: MICRON TECHNOLOGY, INC.
Inventor: Yu Zhang , Wei Bing Shang , En Peng Gao
CPC classification number: G06F11/1076 , G06F3/0619 , G06F3/064 , G06F3/0673 , G06F11/1048 , G11C29/42 , G11C2029/0411 , H03M13/2942 , H03M13/6561
Abstract: One example apparatus includes a first circuit configured to receive first and second data words, to correct one or more errors in the first data word, to merge the corrected first data word and the second data word responsive to a control signal to generate a final merged data word, and to provide the final merged data word to a write circuit. The apparatus also includes a second circuit configured to also receive the first and second data words, to preliminarily merge the first and second data words responsive to the control signal to generate an initial merged data word, to generate an initial parity code for the initial merged data word, to correct the initial parity code, and to provide the corrected parity code to the write circuit.