公开(公告)号：US08395415B2

公开(公告)日：2013-03-12

申请号：US13179342

申请日：2011-07-08

申请人： Benjamin S. Ting ,  Peter M. Pani

发明人： Benjamin S. Ting ,  Peter M. Pani

IPC分类号： H01L25/00

CPC分类号： H03K19/17736 ,  H04L49/10

摘要： An integrated circuit having an L-level permutable switching network (L-PSN) comprising L levels of intermediate conductors and (L+2) levels of conductors for L at least equal to one. At least an (i−1)-th level of conductors of the L-PSN comprising Ii−1 number of conductors selectively couple to the i-th level of conductors comprising Ii number of conductors which comprise of D[i] sets of conductors in the L-PSN, where i is selected from [1:L+1], through ((Ii−1×D[i])+Ii) number of switches where each conductor of the Ii−1 number of conductors selectively couples to at least (D[i]+1) number of conductors of the Ii number of conductors, at least one conductor from each of the D[i] sets of conductors, for D[i] greater than one. The integrated circuit can be used in various electronic devices.

摘要翻译： 一种集成电路，其具有包括L级中间导体和L（L + 2）级导体的L级置换开关网络（L-PSN），L级至少等于1。 包含Ii-1数量的导体的L-PSN的至少第（i-1）级导体选择性地耦合到包括I导体的第i级导体，所述导体包括D [i]组导体 在L-PSN中，其中i选自[1：L + 1]，到（（Ii-1×D [i]）+ Ii）个开关，其中Ii-1个导体的每个导体选择性地耦合 至少（D [i] +1）个导体数量的导体，D [i]组导体中的至少一个导体，D [i]大于1的导体。 集成电路可用于各种电子设备。

公开(公告)号：US20110248744A1

公开(公告)日：2011-10-13

申请号：US13165668

申请日：2011-06-21

申请人： Peter M. Pani ,  Benjamin S. Ting

发明人： Peter M. Pani ,  Benjamin S. Ting

IPC分类号： H03K19/177 ,  H01L21/768

CPC分类号： H03K19/17736 ,  H03K17/002 ,  H04L49/15 ,  H04L49/1515 ,  Y10T29/49002 ,  Y10T29/49117

摘要： A scalable non-blocking switching network (SN) having switches and intermediate (stages of) conductors that are used to connect a first plurality of conductors to other multiple sets of conductors in a generally unrestricted fashion within respective interconnect resources constraints. The SN can be applied in a wide range of applications, in tandem or hierarchically, to provide a large switch network used in network, routers, and programmable logic circuits. The SN is used to connect a first set of conductors, through the SN, to multiple sets of conductors in a given logic circuit hierarchy whereby the conductors in each of the multiple sets are equivalent or exchangeable, which in term, by construction, makes the first set of conductors equivalent when used in the next level of circuit hierarchy. The SN is scalable for large sized sets of conductors and can be used hierarchically to enable programmable interconnections among large sized circuits.

公开(公告)号：US20110089972A1

公开(公告)日：2011-04-21

申请号：US12955738

申请日：2010-11-29

申请人： Peter M. Pani ,  Benjamin S. Ting

发明人： Peter M. Pani ,  Benjamin S. Ting

IPC分类号： H03K19/177 ,  H01L21/768 ,  G06F17/50

CPC分类号： H03K19/17736 ,  H03K17/002 ,  H04L49/15 ,  H04L49/1515 ,  Y10T29/49002 ,  Y10T29/49117

摘要： A scalable non-blocking switching network (SN) having switches and intermediate (stages of) conductors that are used to connect a first plurality of conductors to other multiple sets of conductors in a generally unrestricted fashion within respective interconnect resources constraints. The SN can be applied in a wide range of applications, in tandem or hierarchically, to provide a large switch network used in network, routers, and programmable logic circuits. The SN is used to connect a first set of conductors, through the SN, to multiple sets of conductors in a given logic circuit hierarchy whereby the conductors in each of the multiple sets are equivalent or exchangeable, which in term, by construction, makes the first set of conductors equivalent when used in the next level of circuit hierarchy. The SN is scalable for large sized sets of conductors and can be used hierarchically to enable programmable interconnections among large sized circuits.

摘要翻译： 具有开关和中间（级）导体的可扩展的非阻塞交换网络（SN），其用于在相应的互连资源约束内以大致无限制的方式将第一多个导体连接到其它多组导体。 SN可以应用在广泛的应用中，一起或分层，以提供在网络，路由器和可编程逻辑电路中使用的大型交换机网络。 SN用于将第一组导体（通过SN）连接到给定逻辑电路层级中的多组导体，由此多个组中的每一个中的导体是等同的或可交换的，其在结构上使得 当用于下一级电路层级时，第一组导体相当。 SN可针对大型导体组进行扩展，可以分级使用，以实现大尺寸电路之间的可编程互连。

公开(公告)号：US20110078648A1

公开(公告)日：2011-03-31

申请号：US12568042

申请日：2009-09-28

申请人： Peter M. Pani ,  Benjamin S. Ting

发明人： Peter M. Pani ,  Benjamin S. Ting

IPC分类号： G06F17/50

CPC分类号： G06F17/5068 ,  G06F17/5077 ,  H03K19/177

摘要： A routing fabric using multiple levels of switching networks along with associated routing matrices to allow a more uniform and shorter interconnection or routing path among logic modules or routing modules compared with those in the conventional designs. The resulting routing fabric can be used in electronic devices, such as switching networks, routers, and programmable logic circuits, etc.

摘要翻译： 使用多层交换网络以及相关联的路由矩阵的路由结构，以允许在逻辑模块或路由模块中与传统设计中相比更均匀和更短的互连或路由路径。 所产生的路由结构可以用于诸如交换网络，路由器和可编程逻辑电路等的电子设备中。

公开(公告)号：US07863932B2

公开(公告)日：2011-01-04

申请号：US12794685

申请日：2010-06-04

申请人： Peter M. Pani ,  Benjamin S. Ting

发明人： Peter M. Pani ,  Benjamin S. Ting

IPC分类号： H03K19/177 ,  H01L21/82

CPC分类号： H03K19/17736 ,  H03K17/002 ,  H04L49/15 ,  H04L49/1515 ,  Y10T29/49002 ,  Y10T29/49117

摘要： A scalable non-blocking switching network (SN) having switches and intermediate (stages of) conductors that are used to connect a first plurality of conductors to other multiple sets of conductors in a generally unrestricted fashion within respective interconnect resources constraints. The SN can be applied in a wide range of applications, in tandem or hierarchically, to provide a large switch network used in network, routers, and programmable logic circuits. The SN is used to connect a first set of conductors, through the SN, to multiple sets of conductors in a given logic circuit hierarchy whereby the conductors in each of the multiple sets are equivalent or exchangeable, which in term, by construction, makes the first set of conductors equivalent when used in the next level of circuit hierarchy. The SN is scalable for large sized sets of conductors and can be used hierarchically to enable programmable interconnections among large sized circuits.

公开(公告)号：US20100327907A1

公开(公告)日：2010-12-30

申请号：US12491089

申请日：2009-06-24

申请人： Benjamin S. Ting ,  Peter M. Pani

发明人： Benjamin S. Ting ,  Peter M. Pani

IPC分类号： H03K19/177

CPC分类号： H03K19/17736 ,  H04L49/10

摘要： In one embodiment, an integrated circuit has an L-level permutable switching network (L-PSN) comprising L levels of intermediate conductors and (L+2) levels of conductors for L at least equal to one. An (i−1)-th level of conductors comprising Ii−1 number of conductors selectively couple to the i-th level of conductors comprising Ii number of conductors which comprise of D[i] sets of conductors in the L-PSN, where i is selected from [1:L+1], through ((Ii−1×D[i])+Ii×Q) number of switches where each conductor of the Ii−1 number of conductors selectively couples to at least (D[i]+Q) number of conductors of the Ii number of conductors, at least one conductor from each of the D[i] sets of conductors, for Q at least equal to one and D[i] greater than one. The integrated circuit can be used in various electronic devices.

摘要翻译： 在一个实施例中，集成电路具有L级可替换交换网络（L-PSN），其包括至少等于1的L级中间导体和（L + 2）级导体。 包括Ii-1个导体的导体的第（i-1）级导体选择性地耦合到包括在L-PSN中的D [i]组导体的Ii导体数量的第i级导体，其中 i选自Ii-1导体中的每个导体至少选择耦合到（（Ii-1×D [i]）+ Ii×Q）个开关的[1：L + 1] [i] + Q）I i导体数量的导体，至少一个D [i]组导体的导体，Q至少等于1，D [i]大于1。 集成电路可用于各种电子设备。

公开(公告)号：US07830173B2

公开(公告)日：2010-11-09

申请号：US12401055

申请日：2009-03-10

申请人： Peter M. Pani ,  Benjamin S. Ting

发明人： Peter M. Pani ,  Benjamin S. Ting

IPC分类号： H03K19/177

CPC分类号： H03K19/17704 ,  H03K19/17728 ,  H03K19/17736 ,  H03K19/17744 ,  H03K19/17796

摘要： An integrated circuit including a programmable logic array with a plurality of logic cells and programmable interconnections to receive input signals and to perform logical functions to transmit output signals. The integrated circuit may also include megacells comprising a plurality of functional blocks receiving inputs and transmitting outputs. The integrated circuit may also include a programmable interconnections subsystem to cascade the megacells. The megacells are coupled to the programmable logic array.

摘要翻译： 一种集成电路，其包括具有多个逻辑单元的可编程逻辑阵列和可编程互连以接收输入信号并执行发送输出信号的逻辑功能。 集成电路还可以包括包括接收输入和发送输出的多个功能块的兆字节。 集成电路还可以包括可级联子系统的可编程互连子系统。 大功率器件耦合到可编程逻辑阵列。

公开(公告)号：US20100244895A1

公开(公告)日：2010-09-30

申请号：US12794685

申请日：2010-06-04

申请人： Peter M. Pani ,  Benjamin S. Ting

发明人： Peter M. Pani ,  Benjamin S. Ting

IPC分类号： H03K19/177

CPC分类号： H03K19/17736 ,  H03K17/002 ,  H04L49/15 ,  H04L49/1515 ,  Y10T29/49002 ,  Y10T29/49117

摘要： A scalable non-blocking switching network (SN) having switches and intermediate (stages of) conductors that are used to connect a first plurality of conductors to other multiple sets of conductors in a generally unrestricted fashion within respective interconnect resources constraints. The SN can be applied in a wide range of applications, in tandem or hierarchically, to provide a large switch network used in network, routers, and programmable logic circuits. The SN is used to connect a first set of conductors, through the SN, to multiple sets of conductors in a given logic circuit hierarchy whereby the conductors in each of the multiple sets are equivalent or exchangeable, which in term, by construction, makes the first set of conductors equivalent when used in the next level of circuit hierarchy. The SN is scalable for large sized sets of conductors and can be used hierarchically to enable programmable interconnections among large sized circuits.

摘要翻译： 具有开关和中间（级）导体的可扩展的非阻塞交换网络（SN），其用于在相应的互连资源约束内以大致无限制的方式将第一多个导体连接到其它多组导体。 SN可以应用在广泛的应用中，一起或分层，以提供在网络，路由器和可编程逻辑电路中使用的大型交换机网络。 SN用于将第一组导体（通过SN）连接到给定逻辑电路层级中的多组导体，由此多个组中的每一个中的导体是等同的或可交换的，其在结构上使得 当用于下一级电路层级时，第一组导体相当。 SN可针对大型导体组进行扩展，可以分级使用，以实现大尺寸电路之间的可编程互连。

公开(公告)号：US07768302B2

公开(公告)日：2010-08-03

申请号：US12472305

申请日：2009-05-26

申请人： Peter M. Pani ,  Benjamin S. Ting

发明人： Peter M. Pani ,  Benjamin S. Ting

IPC分类号： H03K19/177

CPC分类号： H03K19/17736 ,  H03K17/002 ,  H04L49/15 ,  H04L49/1515 ,  Y10T29/49002 ,  Y10T29/49117

摘要： A scalable non-blocking switching network (SN) having switches and intermediate (stages of) conductors that are used to connect a first plurality of conductors to other multiple sets of conductors in a generally unrestricted fashion within respective interconnect resources constraints. The SN can be applied in a wide range of applications, in tandem or hierarchically, to provide a large switch network used in network, routers, and programmable logic circuits. The SN is used to connect a first set of conductors, through the SN, to multiple sets of conductors in a given logic circuit hierarchy whereby the conductors in each of the multiple sets are equivalent or exchangeable, which in term, by construction, makes the first set of conductors equivalent when used in the next level of circuit hierarchy. The SN is scalable for large sized sets of conductors and can be used hierarchically to enable programmable interconnections among large sized circuits.

摘要翻译： 具有开关和中间（级）导体的可扩展的非阻塞交换网络（SN），其用于在相应的互连资源约束内以大致无限制的方式将第一多个导体连接到其它多组导体。 SN可以应用在广泛的应用中，一起或分层，以提供在网络，路由器和可编程逻辑电路中使用的大型交换机网络。 SN用于将第一组导体（通过SN）连接到给定逻辑电路层级中的多组导体，由此多个组中的每一个中的导体是等同的或可交换的，其在结构上使得 当用于下一级电路层级时，第一组导体相当。 SN可针对大型导体组进行扩展，可以分级使用，以实现大尺寸电路之间的可编程互连。

公开(公告)号：US06975138B2

公开(公告)日：2005-12-13

申请号：US10811422

申请日：2004-03-25

申请人： Peter M. Pani ,  Benjamin S. Ting

发明人： Peter M. Pani ,  Benjamin S. Ting

IPC分类号： H03K19/177

CPC分类号： H03K19/17704 ,  H03K19/17728 ,  H03K19/17732 ,  H03K19/17736 ,  H03K19/1776 ,  H03K19/1778 ,  H03K19/17796

摘要： A programmable logic device is described having an internal three-statable bus and a plurality of driving elements coupled to the internal three-statable bus. Each of the driving elements is operable to drive the internal three-statable bus. The programmable logic device also includes a plurality of interface logic circuits with each of the plurality of interface logic circuits coupled to a different one of the plurality of driving elements. Each interface logic circuit is operable to determine whether the internal three-statable bus is being driven and the interface logic circuits are collectively operable to prevent contention of signals on the internal three-statable bus.

摘要翻译： 描述了一种可编程逻辑器件，具有内部三态总线和耦合到内部三态总线的多个驱动元件。 每个驱动元件可操作以驱动内部三态总线。 可编程逻辑器件还包括多个接口逻辑电路，多个接口逻辑电路中的每一个耦合到多个驱动元件中的不同驱动元件。 每个接口逻辑电路可操作以确定内部三态总线是否被驱动，并且接口逻辑电路可共同操作以防止内部三态总线上的信号的争用。