公开(公告)号：US10791341B2

公开(公告)日：2020-09-29

申请号：US16155708

申请日：2018-10-09

Applicant: QUALCOMM Incorporated

Inventor： Amir Said ,  Hilmi Enes Egilmez ,  Marta Karczewicz ,  Vadim Seregin ,  Li Zhang ,  Xin Zhao

IPC: H04N19/70 ,  H04N19/184 ,  H04N19/44 ,  H04N19/463 ,  H04N19/91 ,  H04N19/13

Abstract: A video decoder can be configured to generate a first bin stream by, for at least one bin of the first bin stream, determining a first probability estimation for the at least one bin of the first bin stream based on a first set of parameters and generate a second bin stream by, for at least one bin of the second bin stream, determining a second probability estimation for the at least one bin of the second bin stream based on a second set of parameters that are different parameters than the first set of parameters.

公开(公告)号：US10349085B2

公开(公告)日：2019-07-09

申请号：US15432643

申请日：2017-02-14

Applicant: QUALCOMM Incorporated

Inventor： Amir Said ,  Xin Zhao ,  Marta Karczewicz

IPC: H04N19/42 ,  H04N19/44 ,  H04N19/50 ,  H04N19/60 ,  H04N19/61 ,  H04N19/70 ,  H04N19/124 ,  H04N19/159 ,  H04N19/176

Abstract: A device determines a Compact Multi-Pass Transform (CMPT) from a plurality of CMPTs. Additionally, the device decompresses CMPT parameters for the CMPT. In instances where the device decodes video data, the device applies the CMPT to a coefficient block to reconstruct a residual block and decodes, based on a predictive block and the residual block, a current block of a picture of the video data. In instances where the device encodes video data, the device applies the CMPT to a residual block to construct a coefficient block and generates for output information indicating coefficient values for the coefficient block.

公开(公告)号：US20190110064A1

公开(公告)日：2019-04-11

申请号：US16155744

申请日：2018-10-09

Applicant: QUALCOMM Incorporated

Inventor： Kai Zhang ,  Jianle Chen ,  Xin Zhao ,  Marta Karczewicz

IPC: H04N19/52 ,  H04N19/70 ,  H04N19/176 ,  H04N19/184 ,  H04N19/96

Abstract: A device for video decoding can be configured to obtain, from a syntax structure in a bitstream comprising an encoded representation of the video data, a syntax element indicating whether 6-parameter affine prediction is enabled for blocks corresponding to the syntax structure, wherein the blocks corresponding to the syntax structure comprise a first block; based on the syntax element indicating that the 6-parameter affine prediction is enabled for the blocks corresponding to the syntax structure, use the 6-parameter affine prediction to generate a predictive block for the first block; and use the predictive block and residual data to reconstruct the first block.

公开(公告)号：US10200719B2

公开(公告)日：2019-02-05

申请号：US15359568

申请日：2016-11-22

Applicant: QUALCOMM Incorporated

Inventor： Li Zhang ,  Xiang Li ,  Jianle Chen ,  Wei-Jung Chien ,  Xin Zhao ,  Marta Karczewicz

IPC: H04N19/60 ,  H04N19/119 ,  H04N19/61 ,  H04N19/91 ,  H04N19/176 ,  H04N19/587 ,  H04N19/124 ,  H04N19/13 ,  H04N19/186 ,  H04N19/573 ,  H04N19/59 ,  H04N19/96 ,  G06F17/14 ,  H04N19/597 ,  H04N19/105 ,  H04N19/122 ,  H04N19/593 ,  H04N19/132 ,  H04N19/82 ,  H04N19/42 ,  H04N19/625

Abstract: As part of a process of encoding video data, a video encoder applies a transform to a non-square residual block to generate a block of transform coefficients. Furthermore, the video encoder modifies the transform coefficients such that each respective transform coefficient of the block of transform coefficients is based on the respective dequantized transform coefficient multiplied by a factor of √{square root over (2)} or an approximation of √{square root over (2)}. As part of a process of decoding video data, a video decoder applies, by the video decoder, a dequantization process to transform coefficients of a non-square transform block. The video decoder modifies the dequantized transform coefficients such that each respective dequantized transform coefficient of the dequantized transform coefficients is based on the respective dequantized transform coefficient divided by a factor of √{square root over (2)} or an approximation of √{square root over (2)}.

公开(公告)号：US20180205946A1

公开(公告)日：2018-07-19

申请号：US15868821

申请日：2018-01-11

Applicant: QUALCOMM Incorporated

Inventor： Li Zhang ,  Wei-Jung Chien ,  Xin Zhao ,  Marta Karczewicz

IPC: H04N19/103 ,  H04N19/136 ,  H04N19/593

CPC classification number: H04N19/103 ,  H04N19/11 ,  H04N19/136 ,  H04N19/157 ,  H04N19/186 ,  H04N19/593

Abstract: An example device for decoding video data includes a memory for storing video data, and one or more processors implemented in circuitry and configured to construct an intra-prediction candidate list for a current chroma block of the video data indicating candidate intra-prediction modes for the current chroma block, wherein the intra-prediction candidate list indicates a subset of allowed luminance (luma) candidate intra-prediction modes, determine cost (e.g., sum of absolute transform difference (SATD)) values for each of the candidate intra-prediction modes in the intra-prediction candidate list for the current chroma block, and generate a prediction block for the current chroma block using one of the candidate intra-prediction modes indicated by the intra-prediction candidate list according to the cost values (e.g., the candidate intra-prediction mode having the lowest cost value).

公开(公告)号：US20180063553A1

公开(公告)日：2018-03-01

申请号：US15676345

申请日：2017-08-14

Applicant: QUALCOMM Incorporated

Inventor： Li Zhang ,  Wei-Jung Chien ,  Jianle Chen ,  Xin Zhao ,  Marta Karczewicz

IPC: H04N19/96 ,  H04N19/186 ,  H04N19/593 ,  H04N19/46

CPC classification number: H04N19/96 ,  H04N19/11 ,  H04N19/124 ,  H04N19/186 ,  H04N19/46 ,  H04N19/463 ,  H04N19/593 ,  H04N19/70 ,  H04N19/91

Abstract: An example device includes a memory and processing circuitry in communication with the memory. The processing circuitry of a device is configured to form a most probable mode (MPM) candidate list for a chroma block of the video data stored to the memory, such that the MPM candidate list includes one or more derived modes (DMs) associated with a luma block of the video data associated with the chroma block, and a plurality of luma prediction modes that can be used for coding luminance components of the video data. The processing circuitry is further configured to select a mode from the MPM candidate list, and to code the chroma block according to the mode selected from the MPM candidate list.

公开(公告)号：US20170272759A1

公开(公告)日：2017-09-21

申请号：US15463474

申请日：2017-03-20

Applicant: QUALCOMM Incorporated

Inventor： Vadim Seregin ,  Xin Zhao ,  Amir Said ,  Marta Karczewicz

IPC: H04N19/159

CPC classification number: H04N19/11 ,  H04N19/103 ,  H04N19/119 ,  H04N19/136 ,  H04N19/159 ,  H04N19/167 ,  H04N19/176 ,  H04N19/184 ,  H04N19/186 ,  H04N19/46 ,  H04N19/593 ,  H04N19/61 ,  H04N19/70 ,  H04N19/91 ,  H04W84/042

Abstract: A method of decoding video data comprising receiving a block of video data encoded using a position dependent intra prediction combination (PDPC) mode, the block of video data having a non-square shape defined by a width and a height, determining one or more PDPC parameters based on one or more of the width or the height of the block of video data, and decoding the block of video data using the PDPC mode and the determined PDPC parameters.

公开(公告)号：US20170208336A1

公开(公告)日：2017-07-20

申请号：US15404634

申请日：2017-01-12

Applicant: QUALCOMM Incorporated

Inventor： Xiang Li ,  Li Zhang ,  Wei-Jung Chien ,  Jianle Chen ,  Xin Zhao ,  Marta Karczewicz

IPC: H04N19/44 ,  H04N19/60 ,  H04N19/70

CPC classification number: H04N19/44 ,  H04N19/105 ,  H04N19/119 ,  H04N19/136 ,  H04N19/172 ,  H04N19/176 ,  H04N19/50 ,  H04N19/60 ,  H04N19/70

Abstract: A method of decoding video data including receiving a bitstream that includes a sequence of bits that forms a representation of a coded picture of the video data, partitioning the coded picture of the video data into a plurality of blocks using three or more different partition structures, and reconstructing the plurality of blocks of the coded picture of the video data. Partitioning the coded picture of the video data may include partitioning the coded picture of the video data into the plurality of blocks using the three or more different partition structures, wherein at least three of the three or more different partition structures may be used at each depth of a tree structure that represents how a particular block of the coded picture of the video data is partitioned.

公开(公告)号：US20170150183A1

公开(公告)日：2017-05-25

申请号：US15359568

申请日：2016-11-22

Applicant: QUALCOMM Incorporated

Inventor： Li Zhang ,  Xiang Li ,  Jianle Chen ,  Wei-Jung Chien ,  Xin Zhao ,  Marta Karczewicz

IPC: H04N19/91 ,  H04N19/119 ,  H04N19/61

CPC classification number: H04N19/649 ,  G06F17/147 ,  H04N19/105 ,  H04N19/119 ,  H04N19/122 ,  H04N19/124 ,  H04N19/13 ,  H04N19/132 ,  H04N19/176 ,  H04N19/186 ,  H04N19/42 ,  H04N19/573 ,  H04N19/587 ,  H04N19/59 ,  H04N19/593 ,  H04N19/597 ,  H04N19/61 ,  H04N19/625 ,  H04N19/82 ,  H04N19/91 ,  H04N19/96

Abstract: As part of a process of encoding video data, a video encoder applies a transform to a non-square residual block to generate a block of transform coefficients. Furthermore, the video encoder modifies the transform coefficients such that each respective transform coefficient of the block of transform coefficients is based on the respective dequantized transform coefficient multiplied by a factor of √{square root over (2)} or an approximation of √{square root over (2)}. As part of a process of decoding video data, a video decoder applies, by the video decoder, a dequantization process to transform coefficients of a non-square transform block. The video decoder modifies the dequantized transform coefficients such that each respective dequantized transform coefficient of the dequantized transform coefficients is based on the respective dequantized transform coefficient divided by a factor of √{square root over (2)} or an approximation of √{square root over (2)}.

公开(公告)号：US09516306B2

公开(公告)日：2016-12-06

申请号：US14225985

申请日：2014-03-26

Applicant: QUALCOMM Incorporated

Inventor： Li Zhang ,  Ying Chen ,  Xin Zhao

IPC: H04N19/11 ,  H04N19/597 ,  H04N19/196 ,  H04N19/70 ,  H04N19/593 ,  H04N19/14 ,  H04N19/187 ,  H04N19/463 ,  H04N19/91

CPC classification number: H04N19/11 ,  H04N19/14 ,  H04N19/187 ,  H04N19/197 ,  H04N19/463 ,  H04N19/593 ,  H04N19/597 ,  H04N19/70 ,  H04N19/91

Abstract: Techniques are described for encoding and decoding depth data for three-dimensional (3D) video data represented in a multiview plus depth format using depth coding modes that are different than high-efficiency video coding (HEVC) coding modes. Examples of additional depth intra coding modes available in a 3D-HEVC process include at least two of a Depth Modeling Mode (DMM), a Simplified Depth Coding (SDC) mode, and a Chain Coding Mode (CCM). In addition, an example of an additional depth inter coding mode includes an Inter SDC mode. In one example, the techniques include signaling depth intra coding modes used to code depth data for 3D video data in a depth modeling table that is separate from the HEVC syntax. In another example, the techniques of this disclosure include unifying signaling of residual information of depth data for 3D video data across two or more of the depth coding modes.

Abstract translation: 描述了使用与高效率视频编码（HEVC）编码模式不同的深度编码模式来编码和解码以多视图加深度格式表示的三维（3D）视频数据的深度数据的编码和解码技术。 在3D-HEVC过程中可用的附加深度帧内编码模式的示例包括深度建模模式（DMM），简化深度编码（SDC）模式和链式编码模式（CCM）中的至少两个。 此外，附加深度编码模式的示例包括Inter SDC模式。 在一个示例中，这些技术包括用于在与HEVC语法分离的深度建模表中用于对3D视频数据的深度数据进行编码的信令深度帧内编码模式。 在另一示例中，本公开的技术包括跨越两个或更多个深度编码模式统一用于3D视频数据的深度数据的残留信息的信令。