METHOD AND SYSTEM FOR ERROR MANAGEMENT IN A MEMORY DEVICE
    31.
    发明申请
    METHOD AND SYSTEM FOR ERROR MANAGEMENT IN A MEMORY DEVICE 有权
    用于存储器件中的错误管理的方法和系统

    公开(公告)号:US20130117641A1

    公开(公告)日:2013-05-09

    申请号:US13619452

    申请日:2012-09-14

    IPC分类号: G06F11/10

    CPC分类号: G06F11/10 G06F11/1016

    摘要: A method and system for error management in a memory device. In one embodiment of the invention, the memory device can handle commands and address parity errors and cyclic redundancy check errors. In one embodiment of the invention, the memory can detect whether a received command has any parity errors by determining whether the command bits or the address bits of the received command has any parity errors. If a parity error or cyclic redundancy check error in the received command is detected, an error handling mechanism is triggered to recover from the errant command.

    摘要翻译: 一种用于存储器件中的错误管理的方法和系统。 在本发明的一个实施例中,存储器设备可以处理命令和寻址奇偶校验错误和循环冗余校验错误。 在本发明的一个实施例中,存储器可以通过确定接收到的命令的命令位或地址位是否具有任何奇偶校验错误来检测所接收的命令是否具有任何奇偶校验错误。 如果检测到接收到的命令中的奇偶校验错误或循环冗余校验错误,则触发错误处理机制以从错误命令中恢复。