公开(公告)号：US20100223600A1

公开(公告)日：2010-09-02

申请号：US12394445

申请日：2009-02-27

申请人： Hazim Shafi ,  Brian Adelberg ,  Khaled S. Sedky

发明人： Hazim Shafi ,  Brian Adelberg ,  Khaled S. Sedky

IPC分类号： G06F9/44

CPC分类号： G06F11/3636

摘要： A thread execution analyzer analyzes blocking events of threads in a program using execution data and callstacks collected at the blocking events. The thread execution analyzer attempts to identify an application programming interface (API) responsible for each blocking event and provides blocking analysis information to a user. The blocking analysis information may be used by a developer of the program to understand the causes of blocking events that occur for threads of the program.

摘要翻译： 线程执行分析器使用在阻塞事件处收集的执行数据和调用堆栈来分析程序中线程的阻塞事件。 线程执行分析器尝试识别负责每个阻塞事件的应用程序编程接口（API），并向用户提供阻止分析信息。 程序的开发人员可以使用阻止分析信息来了解程序线程发生的阻塞事件的原因。

公开(公告)号：US20080263284A1

公开(公告)日：2008-10-23

申请号：US12145034

申请日：2008-06-24

申请人： Dilma Menezes da Silva ,  Elmootazbellah Nabil Elnozahy ,  Orran Yaakov Krieger ,  Hazim Shafi ,  Xiaowei Shen ,  Balaram Sinharoy ,  Robert Brett Tremaine

发明人： Dilma Menezes da Silva ,  Elmootazbellah Nabil Elnozahy ,  Orran Yaakov Krieger ,  Hazim Shafi ,  Xiaowei Shen ,  Balaram Sinharoy ,  Robert Brett Tremaine

IPC分类号： G06F12/08

CPC分类号： G06F12/08 ,  G06F12/0893 ,  G06F2212/251 ,  G06F2212/253

摘要： Methods, systems, and media for reducing memory latency seen by processors by providing a measure of control over on-chip memory (OCM) management to software applications, implicitly and/or explicitly, via an operating system are contemplated. Many embodiments allow part of the OCM to be managed by software applications via an application program interface (API), and part managed by hardware. Thus, the software applications can provide guidance regarding address ranges to maintain close to the processor to reduce unnecessary latencies typically encountered when dependent upon cache controller policies. Several embodiments utilize a memory internal to the processor or on a processor node so the memory block used for this technique is referred to as OCM.

摘要翻译： 考虑通过操作系统提供对软件应用（OCM）的控制的措施来减少处理器所看到的存储器延迟的方法，系统和媒体。 许多实施例允许OCM的一部分由软件应用程序通过应用程序接口（API）和由硬件管理的部分来管理。 因此，软件应用程序可以提供关于地址范围的指导，以保持靠近处理器，以减少在依赖于缓存控制器策略时通常遇到的不必要的延迟。 几个实施例利用处理器内部或处理器节点上的存储器，因此用于该技术的存储器块被称为OCM。

公开(公告)号：US07437517B2

公开(公告)日：2008-10-14

申请号：US11032876

申请日：2005-01-11

申请人： Dilma Menezes da Silva ,  Elmootazbellah Nabil Elnozahy ,  Orran Yaakov Krieger ,  Hazim Shafi ,  Xiaowei Shen ,  Balaram Sinharoy ,  Robert Brett Tremaine

发明人： Dilma Menezes da Silva ,  Elmootazbellah Nabil Elnozahy ,  Orran Yaakov Krieger ,  Hazim Shafi ,  Xiaowei Shen ,  Balaram Sinharoy ,  Robert Brett Tremaine

IPC分类号： G06F12/00 ,  G06F13/00 ,  G06F3/00

CPC分类号： G06F12/08 ,  G06F12/0893 ,  G06F2212/251 ,  G06F2212/253

摘要： Methods, systems, and media for reducing memory latency seen by processors by providing a measure of control over on-chip memory (OCM) management to software applications, implicitly and/or explicitly, via an operating system are contemplated. Many embodiments allow part of the OCM to be managed by software applications via an application program interface (API), and part managed by hardware. Thus, the software applications can provide guidance regarding address ranges to maintain close to the processor to reduce unnecessary latencies typically encountered when dependent upon cache controller policies. Several embodiments utilize a memory internal to the processor or on a processor node so the memory block used for this technique is referred to as OCM.

摘要翻译： 考虑通过操作系统提供对软件应用（OCM）的控制的措施来减少处理器所看到的存储器延迟的方法，系统和媒体。 许多实施例允许OCM的一部分由软件应用程序通过应用程序接口（API）和由硬件管理的部分来管理。 因此，软件应用程序可以提供关于地址范围的指导，以保持靠近处理器，以减少在依赖于缓存控制器策略时通常遇到的不必要的延迟。 几个实施例利用处理器内部或处理器节点上的存储器，因此用于该技术的存储器块被称为OCM。

公开(公告)号：US07395407B2

公开(公告)日：2008-07-01

申请号：US11250288

申请日：2005-10-14

申请人： Xiaowei Shen ,  Hazim Shafi

发明人： Xiaowei Shen ,  Hazim Shafi

IPC分类号： G06F12/00

CPC分类号： G06F12/0862 ,  G06F12/0815 ,  G06F2212/6026

摘要： The present invention comprises a data access pattern interface that allows software to specify one or more data access patterns such as stream access patterns, pointer-chasing patterns and producer-consumer patterns. Software detects a data access pattern for a memory region and passes the data access pattern information to hardware via proper data access pattern instructions defined in the data access pattern interface. Hardware maintains the data access pattern information properly when the data access pattern instructions are executed. Hardware can then use the data access pattern information to dynamically detect data access patterns for a memory region throughout the program execution, and voluntarily invoke appropriate memory and cache operations such as pre-fetch, pre-send, acquire-ownership and release-ownership. Further, hardware can provide runtime monitoring information for memory accesses to the memory region, wherein the runtime monitoring information indicates whether the software-provided data access pattern information is accurate.

摘要翻译： 本发明包括数据访问模式接口，其允许软件指定一个或多个数据访问模式，例如流访问模式，指针追踪模式和生产者 - 消费者模式。 软件检测存储器区域的数据访问模式，并通过数据访问模式界面中定义的适当的数据访问模式指令将数据访问模式信息传递给硬件。 当执行数据访问模式指令时，硬件正确地维护数据访问模式信息。 然后，硬件可以使用数据访问模式信息在整个程序执行期间动态地检测存储器区域的数据访问模式，并且主动地调用适当的存储器和缓存操作，例如预取，预发送，获取所有权和释放所有权。 此外，硬件可以提供用于存储器访问存储器区域的运行时监视信息，其中运行时监视信息指示软件提供的数据访问模式信息是否准确。

公开(公告)号：US09846628B2

公开(公告)日：2017-12-19

申请号：US12816165

申请日：2010-06-15

申请人： Edward G. Essey ,  Igor Ostrovsky ,  Pooja Nagpal ,  Huseyin S. Yildiz ,  Hazim Shafi ,  William T. Colburn

发明人： Edward G. Essey ,  Igor Ostrovsky ,  Pooja Nagpal ,  Huseyin S. Yildiz ,  Hazim Shafi ,  William T. Colburn

IPC分类号： G06F9/44 ,  G06F3/048 ,  G06F11/32 ,  G06F11/34

CPC分类号： G06F11/323 ,  G06F11/3409 ,  G06F11/3476 ,  G06F2201/86

摘要： The present invention extends to methods, systems, and computer program products for indicating parallel operations with user-visible events. Event markers can be used to indicate an abstracted outer layer of execution as well as expose internal specifics of parallel processing systems, including systems that provide data parallelism. Event markers can be used to show a variety of execution characteristics including higher-level markers to indicate the beginning and end of an execution program (e.g., a query). Inside the execution program (query) individual fork/join operations can be indicated with sub-levels of markers to expose their operations. Additional decisions made by an execution engine, such as, for example, when elements initially yield, when queries overlap or nest, when the query is cancelled, when the query bails to sequential operation, when premature merging or re-partitioning are needed can also be exposed.

公开(公告)号：US08990551B2

公开(公告)日：2015-03-24

申请号：US12883859

申请日：2010-09-16

申请人： Hazim Shafi

发明人： Hazim Shafi

IPC分类号： G06F1/24 ,  G06F9/00 ,  G06F9/50 ,  G06F11/32 ,  G06F11/36 ,  G06F11/34

CPC分类号： G06F9/5011 ,  G06F11/323 ,  G06F11/3404 ,  G06F11/3612 ,  G06F2209/508

摘要： An analysis and visualization depicts how an application is leveraging processor cores of a distributed computing system, such as a computer cluster, in time. The analysis and visualization enables a developer to readily identify the degree of concurrency exploited by an application at runtime and the amount of overhead used by libraries or middleware. Information regarding processes or threads running on the nodes over time is received, analyzed, and presented to indicate portions of computer cluster that are used by the application, idle, other processes, and libraries in the system. The analysis and visualization can help a developer understand or confirm contention for or under-utilization of system resources for the application and libraries.

摘要翻译： 分析和可视化描述了应用程序如何及时利用分布式计算系统（如计算机集群）的处理器核心。 分析和可视化使开发人员能够轻松识别应用程序在运行时利用的并发程度以及库或中间件使用的开销量。 接收，分析和呈现关于节点上随时间运行的进程或线程的信息，以指示系统中应用程序，空闲，其他进程和库使用的计算机集群的部分。 分析和可视化可以帮助开发人员了解或确认应用程序和库的系统资源的争用或利用不足。

公开(公告)号：US20110078661A1

公开(公告)日：2011-03-31

申请号：US12571075

申请日：2009-09-30

申请人： Hazim Shafi

发明人： Hazim Shafi

IPC分类号： G06F9/44

CPC分类号： G06F11/3664 ,  G06F11/323 ,  G06F11/3476 ,  G06F11/3624 ,  G06F11/3632 ,  G06F2201/865

摘要： The use of marker(s) in the source code of a program under evaluation. A representation of the marker(s) remains in the binary version of the program under evaluation. During execution, upon executing the marker, data is gathered regarding the timeline of the execution of the marker in the context of overall timeline of execution. A visualization of the marker is then displayed that illustrates the execution of the marker in the context of a larger timeframe of execution. Optionally, the marker may be associated with text, or other data, at least some of which being rendered with the visualization. Accordingly, an application developer, or indeed anyone evaluating the program, may place markers within source code and/or evaluate the timeline of execution of those markers.

摘要翻译： 在评估程序的源代码中使用标记。 标记的表示保留在正在评估的程序的二进制版本中。 在执行期间，在执行标记时，在总执行时间线的上下文中收集关于标记执行的时间线的数据。 然后显示标记的可视化，其示出了在更大的执行时间范围内的标记的执行。 可选地，标记可以与文本或其他数据相关联，其中至少一些被可视化呈现。 因此，应用程序开发人员或任何评估程序的人员可以将标记放置在源代码中和/或评估执行这些标记的时间线。

公开(公告)号：US20090319996A1

公开(公告)日：2009-12-24

申请号：US12143863

申请日：2008-06-23

申请人： Hazim Shafi ,  Brian Adelberg ,  Maria Blees ,  Paulo Janotti ,  Khaled Sedky

发明人： Hazim Shafi ,  Brian Adelberg ,  Maria Blees ,  Paulo Janotti ,  Khaled Sedky

IPC分类号： G06F9/44

CPC分类号： G06F8/314

摘要： Thread blocking synchronization event analysis software uses kernel context switch data and thread unblocking data to form a visualization of thread synchronization behavior. The visualization provides interactive access to source code responsible for thread blocking, identifies blocking threads and blocked threads, summarizes execution delays due to synchronization and lists corresponding APIs and objects, correlates thread synchronization events with application program phases, and otherwise provides information associated with thread synchronization. The visualization may operate within an integrated development environment.

摘要翻译： 线程阻塞同步事件分析软件使用内核上下文切换数据和线程解锁数据来形成线程同步行为的可视化。 可视化提供对负责线程阻塞的源代码的交互访问，识别阻塞线程和阻塞线程，总结由于同步引起的执行延迟并列出相应的API和对象，将线程同步事件与应用程序阶段相关联，否则提供与线程同步相关的信息 。 可视化可以在集成开发环境中运行。

公开(公告)号：US07380068B2

公开(公告)日：2008-05-27

申请号：US11260555

申请日：2005-10-27

申请人： Hazim Shafi ,  William E. Speight

发明人： Hazim Shafi ,  William E. Speight

IPC分类号： G06F13/00

CPC分类号： G06F12/0817 ,  G06F12/0897 ,  G06F2212/2542

摘要： A data processing unit, method, and computer-usable medium for contention-based cache performance optimization. Two or more processing cores are coupled by an interconnect. Coupled to the interconnect is a memory hierarchy that includes a collection of caches. Resource utilization over a time interval is detected over the interconnect. Responsive to detecting a threshold of resource utilization of the interconnect, a functional mode of a cache from the collection of caches is selectively enabled.

摘要翻译： 一种用于基于争用的缓存性能优化的数据处理单元，方法和计算机可用介质。 两个或多个处理核心通过互连耦合。 连接到互连是包含高速缓存集合的存储器层次结构。 通过互连检测在一段时间间隔内的资源利用率。 响应于检测互连的资源利用的阈值，选择性地启用来自高速缓存集合的高速缓存的功能模式。

公开(公告)号：US20070101067A1

公开(公告)日：2007-05-03

申请号：US11260555

申请日：2005-10-27

申请人： Hazim Shafi ,  William Speight

发明人： Hazim Shafi ,  William Speight

IPC分类号： G06F13/28 ,  G06F12/00

CPC分类号： G06F12/0817 ,  G06F12/0897 ,  G06F2212/2542

摘要： A data processing unit, method, and computer-usable medium for contention-based cache performance optimization. Two or more processing cores are coupled by an interconnect. Coupled to the interconnect is a memory hierarchy that includes a collection of caches. Resource utilization over a time interval is detected over the interconnect. Responsive to detecting a threshold of resource utilization of the interconnect, a functional mode of a cache from the collection of caches is selectively enabled.

摘要翻译： 一种用于基于争用的缓存性能优化的数据处理单元，方法和计算机可用介质。 两个或多个处理核心通过互连耦合。 连接到互连是包含高速缓存集合的存储器层次结构。 通过互连检测在一段时间间隔内的资源利用率。 响应于检测互连的资源利用的阈值，选择性地启用来自高速缓存集合的高速缓存的功能模式。