公开(公告)号：US20090196180A1

公开(公告)日：2009-08-06

申请号：US12061577

申请日：2008-04-02

申请人： Paramvir Bahl ,  Ranveer Chandra ,  Thomas Moscibroda ,  Gopala Sri Hari Narlanka ,  Yunnan Wu ,  Yuan Yuan

发明人： Paramvir Bahl ,  Ranveer Chandra ,  Thomas Moscibroda ,  Gopala Sri Hari Narlanka ,  Yunnan Wu ,  Yuan Yuan

IPC分类号： H04L12/26 ,  H04W4/00 ,  H04J1/16

CPC分类号： H04W72/0446 ,  H04L5/0023 ,  H04L5/0032 ,  H04L5/0039 ,  H04L5/0066 ,  H04L5/0094 ,  H04W16/14

摘要： Dynamic time-spectrum block allocation for cognitive radio networks is described. In one implementation, without need for a central controller, peer wireless nodes collaboratively sense local utilization of a communication spectrum and collaboratively share white spaces for communication links between the nodes. Sharing local views of the spectrum utilization with each other allows the nodes to dynamically allocate non-overlapping time-frequency blocks to the communication links between the nodes for efficiently utilizing the white spaces. The blocks are sized to optimally pack the available white spaces. The nodes regularly readjust the bandwidth and other parameters of all reserved blocks in response to demand, so that packing of the blocks in available white spaces maintains a fair distribution of the overall bandwidth of the white spaces among active communication links, minimizes finishing time of all communications, reduces contention overhead among the nodes contending for the white spaces, and maintains non-overlapping blocks.

摘要翻译： 描述了认知无线电网络的动态时频块分配。 在一个实现中，不需要中央控制器，对等无线节点协同地感知通信频谱的本地利用，并且协作地共享用于节点之间的通信链路的空白空间。 共享频谱利用率的局部视图允许节点动态地将不重叠的时间频率块分配给节点之间的通信链路，以有效地利用白色空间。 这些块的大小可以最佳地打包可用的空白空间。 节点响应于需求定期重新调整所有保留块的带宽和其他参数，使得可用空白块中的块的打包保持主动通信链路之间白色空间的总带宽的公平分配，最小化所有的完成时间 通信，减少竞争白空间的节点之间的争用开销，并维护不重叠的块。

公开(公告)号：US20090034457A1

公开(公告)日：2009-02-05

申请号：US11832624

申请日：2007-08-01

申请人： Paramvir Bahl ,  Ranveer Chandra ,  Thomas Moscibroda ,  Gopala Sri Hari Narlanka ,  Yunnan Wu ,  Yuan Yuan

发明人： Paramvir Bahl ,  Ranveer Chandra ,  Thomas Moscibroda ,  Gopala Sri Hari Narlanka ,  Yunnan Wu ,  Yuan Yuan

IPC分类号： H04Q7/00

CPC分类号： H04W16/10 ,  H04W28/16

摘要： Techniques for enhancing throughput capacity and/or bandwidth distribution fairness among APs in a wireless network are described. Specifically, a channel frequency profile which includes a center frequency and channel-width (i.e., channel bandwidth) is dynamically assigned to each of one or more APs in a wireless network. The assigned channel frequency profile for each AP is based, at least in part, on the current composition of the wireless network including, its topology and traffic load distribution. In this regard, each AP's channel frequency profile can be continuously or periodically changed such that the entire available frequency spectrum is effectively utilized and/or interference between APs is avoided or limited. This, in turn, enhances the throughput capacity and/or bandwidth distribution fairness of the wireless network.

摘要翻译： 描述了用于在无线网络中的AP之间增强吞吐量容量和/或带宽分配公平性的技术。 具体地，包括中心频率和信道宽度（即，信道带宽）的信道频率分布被动态分配给无线网络中的一个或多个AP的每一个。 每个AP的分配的信道频率分布至少部分地基于无线网络的当前组成，包括其拓扑和业务负载分布。 在这方面，可以连续地或周期性地改变每个AP的信道频率分布，使得有效利用整个可用频谱和/或避免或限制AP之间的干扰。 这又增强了无线网络的吞吐能力和/或带宽分配公平性。

公开(公告)号：US08943510B2

公开(公告)日：2015-01-27

申请号：US12971983

申请日：2010-12-17

申请人： Rotem Oshman ,  John R. Douceur ,  Thomas Moscibroda

发明人： Rotem Oshman ,  John R. Douceur ,  Thomas Moscibroda

IPC分类号： G06F9/46 ,  G06F9/52 ,  G06F11/14

CPC分类号： G06F9/526 ,  G06F11/1479 ,  G06F2201/825

摘要： Techniques for implementing mutual-exclusion algorithms that are also fault-resistant are described herein. For instance, this document describes systems that implement fault-resistant, mutual-exclusion algorithms that at least prevent simultaneous access of a shared resource by multiple threads when (i) one of the multiple threads is in its critical section, and (ii) the other thread(s) are waiting in a loop to enter their respective critical sections. In some instances, these algorithms are fault-tolerant to prevent simultaneous access of the shared resource regardless of a state of the multiple threads executing on the system. In some instances, these algorithms may resist (e.g., tolerate entirely) transient memory faults (or “soft errors”).

摘要翻译： 本文描述了用于实现也是故障抵抗的互斥算法的技术。 例如，本文档描述了实现防故障互斥算法的系统，当（i）多个线程中的一个处于其关键部分时，至少防止多个线程同时访问共享资源，以及（ii） 其他线程正在等待循环进入各自的关键部分。 在某些情况下，这些算法是容错的，以防止共享资源的同时访问，而不管系统上执行多个线程的状态如何。 在某些情况下，这些算法可以抵抗（例如，完全容忍）瞬态存储器故障（或“软错误”）。

公开(公告)号：US20110288934A1

公开(公告)日：2011-11-24

申请号：US12786231

申请日：2010-05-24

申请人： John R. Douceur ,  Jacob R. Lorch ,  James Mickens ,  Thomas Moscibroda ,  David Levin

发明人： John R. Douceur ,  Jacob R. Lorch ,  James Mickens ,  Thomas Moscibroda ,  David Levin

IPC分类号： G06Q30/00 ,  G06F17/30 ,  G06F3/048

CPC分类号： G06Q30/0241 ,  G06Q30/0251 ,  G06Q30/0255 ,  G06Q30/0269

摘要： Techniques are described to mitigate ad stalking and other user concerns resulting from user-targeted advertising. A user may be informed of advertising information by a process in which an advertising server receives a request for an ad. The request may have been generated in response to a user request for a landing web page. An ad may be selected based on user information available to the advertising server, where the user information is associated with the user and describes behavior and/or attributes and/or preferences associated with the user. Text about how the ad was selected may be incorporated into the ad. Such text may describe the user information used to select the ad. The selection-disclosing text may be incorporated in the ad in a form that is displayable to the user by a browser. The ad may then be transmitted for display in the landing web page.

摘要翻译： 描述技术来减轻由用户定向广告产生的广告跟踪和其他用户关注的问题。 可以通过广告服务器接收到广告请求的处理来向用户通知广告信息。 请求可能是响应于用户对登陆网页的请求而产生的。 可以基于广告服务器可用的用户信息来选择广告，其中用户信息与用户相关联并且描述与用户相关联的行为和/或属性和/或偏好。 关于广告如何选择的文字可能会纳入广告。 这样的文本可以描述用于选择广告的用户信息。 选择公开的文本可以以浏览器向用户显示的形式并入广告中。 该广告然后可以被传输以在着陆网页中显示。

公开(公告)号：US20100318786A1

公开(公告)日：2010-12-16

申请号：US12483338

申请日：2009-06-12

申请人： John R. Douceur ,  David M. Levin ,  Jacob R. Lorch ,  Thomas Moscibroda

发明人： John R. Douceur ,  David M. Levin ,  Jacob R. Lorch ,  Thomas Moscibroda

IPC分类号： H04L29/06

CPC分类号： H04L63/123 ,  H04L9/3247 ,  H04L29/06 ,  H04L2209/127

摘要： Techniques for utilizing trusted hardware components for mitigating the effects of equivocation amongst participant computing devices of a distributed system are described herein. For instance, a distributed system employing a byzantine-fault-resilient protocol—that is, a protocol intended to mitigate (e.g., tolerate, detect, isolate, etc.) the effects of byzantine faults—may employ the techniques. To do so, the techniques may utilize a trusted hardware component comprising a non-decreasing counter and a key. This hardware component may be “trusted” in that the respective participant computing device cannot modify or observe the contents of the component in any manner other than according to the prescribed procedures, as described herein. Furthermore, the trusted hardware component may couple to the participant computing device in any suitable manner, such as via a universal serial bus (USB) connection or the like.

摘要翻译： 在此描述了利用可信硬件组件来减轻分布式系统的参与者计算设备之间的混淆效应的技术。 例如，采用拜占庭故障弹性协议的分布式系统 - 即旨在减轻（例如，容忍，检测，隔离等）拜占庭故障的影响的协议 - 可以采用这些技术。 为了这样做，这些技术可以利用包括非递减计数器和密钥的可信硬件组件。 该硬件组件可能是“可信赖的”，因为如本文所述，相应的参与者计算设备不能以除了根据规定的过程之外的任何方式修改或观察组件的内容。 此外，可信硬件组件可以以任何合适的方式，例如经由通用串行总线（USB）连接等耦合到参与者计算设备。

公开(公告)号：US08245232B2

公开(公告)日：2012-08-14

申请号：US12042359

申请日：2008-03-05

申请人： Onur Mutlu ,  Thomas Moscibroda

发明人： Onur Mutlu ,  Thomas Moscibroda

IPC分类号： G06F9/46 ,  G06F9/48

CPC分类号： G06F13/1663

摘要： Systems and methodologies for stall-time fair memory access scheduling for shared memory systems are provided herein. A stall-time fairness policy can be applied in accordance with various aspects described herein to schedule memory requests from threads sharing a memory system. To this end, a Stall-Time Fair Memory scheduler (STFM) algorithm can be utilized, wherein memory-related slowdown experienced by a group of threads due to interference from other threads is equalized. Additionally and/or alternatively, a traditional scheduling policy such as first-ready first-come-first-serve (FR-FCFS) can be utilized in combination with a cap on column-over-row reordering of memory requests, thereby reducing the amount of stall-time unfairness imposed by such traditional scheduling policies. Further, various aspects described herein can perform memory scheduling based on thread weights and/or other parameters, which can be configured in hardware and/or software.

摘要翻译： 本文提供了用于共享存储器系统的停机时间公平存储器访问调度的系统和方法。 可以根据本文描述的各个方面来应用停顿时间公平策略，以从共享存储器系统的线程调度存储器请求。 为此，可以利用停顿时间公平内存调度器（STFM）算法，其中由于来自其他线程的干扰而由一组线程所经历的存储器相关的减速被均衡。 附加地和/或替代地，传统的调度策略，例如第一就绪先到先服务（FR-FCFS）可以与存储器请求的行列重排序的上限结合使用，从而减少量 这种传统的调度政策施加的停滞时间不公平。 此外，本文所描述的各个方面可以基于可以在硬件和/或软件中配置的线程权重和/或其他参数来执行存储器调度。

公开(公告)号：US20120159504A1

公开(公告)日：2012-06-21

申请号：US12971983

申请日：2010-12-17

申请人： Rotem Oshman ,  John R. Douceur ,  Thomas Moscibroda

发明人： Rotem Oshman ,  John R. Douceur ,  Thomas Moscibroda

IPC分类号： G06F9/46

CPC分类号： G06F9/526 ,  G06F11/1479 ,  G06F2201/825

摘要： Techniques for implementing mutual-exclusion algorithms that are also fault-resistant are described herein. For instance, this document describes systems that implement fault-resistant, mutual-exclusion algorithms that at least prevent simultaneous access of a shared resource by multiple threads when (i) one of the multiple threads is in its critical section, and (ii) the other thread(s) are waiting in a loop to enter their respective critical sections. In some instances, these algorithms are fault-tolerant to prevent simultaneous access of the shared resource regardless of a state of the multiple threads executing on the system. In some instances, these algorithms may resist (e.g., tolerate entirely) transient memory faults (or “soft errors”).

摘要翻译： 本文描述了用于实现也是故障抵抗的互斥算法的技术。 例如，本文档描述了实现防故障互斥算法的系统，当（i）多个线程中的一个处于其关键部分时，至少防止多个线程同时访问共享资源，以及（ii） 其他线程正在等待循环进入各自的关键部分。 在某些情况下，这些算法是容错的，以防止共享资源的同时访问，而不管系统上执行多个线程的状态如何。 在某些情况下，这些算法可以抵抗（例如，完全容忍）瞬态存储器故障（或“软错误”）。

公开(公告)号：US08001338B2

公开(公告)日：2011-08-16

申请号：US11842772

申请日：2007-08-21

申请人： Thomas Moscibroda ,  Onur Mutlu

发明人： Thomas Moscibroda ,  Onur Mutlu

IPC分类号： G06F12/00

CPC分类号： G06F13/1642

摘要： Providing for multi-tiered RAM control is provided herein. As an example, a RAM access management system can include multiple input controllers each having a request buffer and request scheduler. Furthermore, a request buffer associated with a controller can vary in size with respect to other buffers. Additionally, request schedulers can vary in complexity and can be optimized at least for a particular request buffer size. As a further example, a first controller can have a large memory buffer and simple scheduling algorithm optimized for scalability. A second controller can have a small memory buffer and a complex scheduler, optimized for efficiency and high RAM performance. Generally, RAM management systems described herein can increase memory system scalability for multi-core parallel processing devices while providing an efficient and high bandwidth RAM interface.

摘要翻译： 本文提供了多层RAM控制。 作为示例，RAM访问管理系统可以包括每个具有请求缓冲器和请求调度器的多个输入控制器。 此外，与控制器相关联的请求缓冲器的大小可以相对于其他缓冲器而变化。 此外，请求调度器可以在复杂性方面变化，并且可以至少针对特定请求缓冲器大小进行优化。 作为另一示例，第一控制器可以具有大的存储器缓冲器和针对可扩展性优化的简单调度算法。 第二个控制器可以有一个小的内存缓冲区和一个复杂的调度器，为效率和高性能而优化。 通常，本文描述的RAM管理系统可以提供多核并行处理设备的存储器系统可扩展性，同时提供高效且高带宽的RAM接口。

公开(公告)号：US20100202449A1

公开(公告)日：2010-08-12

申请号：US12370467

申请日：2009-02-12

申请人： Thomas Moscibroda ,  Onur Mutlu

发明人： Thomas Moscibroda ,  Onur Mutlu

IPC分类号： H04L12/56

CPC分类号： H04L45/00 ,  H04L45/40 ,  H04L49/109 ,  H04L49/251

摘要： As microprocessors incorporate more and more devices on a single chip, dedicated buses have given way to on-chip interconnection networks (“OCIN”). Routers in a bufferless OCIN as described herein rank and prioritize flits. Flits traverse a productive path towards their destination or undergo temporary deflection to other non-productive paths, without buffering. Eliminating the buffers of on-chip routers reduces power consumption and heat dissipation while freeing up chip surface area for other uses. Furthermore, bufferless design enables purely local flow control of data between devices in the on-chip network, reducing router complexity and enabling reductions in router latency. Router latency reductions are possible in the bufferless on-chip routing by using lookahead links to send data between on-chip routers contemporaneously with flit traversals.

摘要翻译： 随着微处理器在单个芯片上集成越来越多的器件，专用总线已经放弃了片上互连网络（“OCIN”）。 如本文所述的无缓冲区OCIN中的路由器对flits进行排序和优先级排序。 飞行器朝着目的地穿过生产路径，或者暂时偏转到其他非生产性路径，而不会缓冲。 消除片上路由器的缓冲区可以降低功耗和散热，同时释放芯片表面积用于其他用途。 此外，无缓冲设计可实现对片上网络设备之间的数据进行纯粹本地流量控制，从而降低路由器的复杂性并降低路由器延迟。 通过使用先行链接在片上路由器同时与flit遍历之间发送数据，在缓冲区片内路由中路由器延迟减少是可能的。

公开(公告)号：US20090307691A1

公开(公告)日：2009-12-10

申请号：US12132650

申请日：2008-06-04

申请人： Thomas Moscibroda ,  Onur Mutlu

发明人： Thomas Moscibroda ,  Onur Mutlu

IPC分类号： G06F9/46

CPC分类号： G06F13/1652 ,  Y02D10/14

摘要： Systems and methods that coordinate operations among a plurality of memory controllers to make a decision for performing an action based in part on state information. A control component facilitates exchange of information among memory controllers, wherein exchanged state information of the memory controllers are further employed to perform computations that facilitate the decision making process.

摘要翻译： 协调多个存储器控制器之间的操作以部分地基于状态信息执行动作的决定的系统和方法。 控制部件促进存储器控制器之间的信息交换，其中进一步使用存储器控制器的交换状态信息来执行便于决策过程的计算。