Wake-and-Go Mechanism with Exclusive System Bus Response
    31.
    发明申请
    Wake-and-Go Mechanism with Exclusive System Bus Response 有权
    具有独家系统总线响应的唤醒机制

    公开(公告)号:US20100293341A1

    公开(公告)日:2010-11-18

    申请号:US12024250

    申请日:2008-02-01

    IPC分类号: G06F9/30 G06F12/00

    摘要: A wake-and-go mechanism is configured to issue a look-ahead load command on a system bus to read a data value from a target address and perform a comparison operation to determine whether the data value at the target address indicates that an event for which a thread is waiting has occurred. In response to the comparison resulting in a determination that the event has not occurred, the wake-and-go engine populates the wake-and-go storage array with the target address. In response to the comparison resulting in a determination that the event has occurred, the wake-and-go engine issues a load command on the system bus to read the data value from the target address with data exclusivity and determines whether the wake-and-go engine obtains a lock for the target address. Responsive to obtaining the lock for the target address, the wake-and-go engine holds the lock for the thread.

    摘要翻译: 唤醒机制被配置为在系统总线上发出预先加载命令以从目标地址读取数据值并执行比较操作以确定目标地址上的数据值是否指示用于 一个线程正在等待发生。 响应于比较导致事件未发生的确定,唤醒和引导引擎使用目标地址填充唤醒存储阵列。 响应于导致确定事件已经发生的比较,唤醒引导器在系统总线上发出加载命令以从数据排他性的目标地址读取数据值,并且确定唤醒 - go引擎获取目标地址的锁。 响应于获取目标地址的锁,唤醒引导器保持线程的锁定。

    Wake-and-Go Mechanism with System Bus Response
    32.
    发明申请
    Wake-and-Go Mechanism with System Bus Response 有权
    唤醒与系统总线响应机制

    公开(公告)号:US20100293340A1

    公开(公告)日:2010-11-18

    申请号:US12024204

    申请日:2008-02-01

    IPC分类号: G06F12/08

    摘要: A wake-and-go mechanism is provided for a data processing system. The wake-and-go mechanism is configured to issue a look-ahead load command on a system bus to read a data value from a target address and perform a comparison operation to determine whether the data value at the target address indicates that an event for which a thread is waiting has occurred. In response to the comparison resulting in a determination that the event has not occurred, the wake-and-go engine populates a wake-and-go storage array with the target address and snooping the target address on the system bus without data exclusivity. In response to the comparison resulting in a determination that the event has occurred, the wake-and-go engine issues a load command on the system bus to read the data value from the target address with data exclusivity.

    摘要翻译: 为数据处理系统提供了一个唤醒机制。 唤醒机制被配置为在系统总线上发出预先加载命令以从目标地址读取数据值并执行比较操作以确定目标地址上的数据值是否指示用于 一个线程正在等待发生。 响应于比较导致事件未发生的确定,唤醒引导器填充具有目标地址的唤醒存储阵列并且在系统总线上窥探目标地址而没有数据独占性。 响应于导致确定事件已经发生的比较,唤醒引导器在系统总线上发出加载命令以从具有数据排他性的目标地址读取数据值。

    Wake-and-Go Mechanism with Hardware Private Array
    33.
    发明申请
    Wake-and-Go Mechanism with Hardware Private Array 有权
    具有硬件私有阵列的唤醒机制

    公开(公告)号:US20090199183A1

    公开(公告)日:2009-08-06

    申请号:US12024705

    申请日:2008-02-01

    IPC分类号: G06F9/46 G06F1/32

    CPC分类号: G06F9/52 G06F2209/521

    摘要: A wake-and-go mechanism is provided for a data processing system. When a thread is waiting for an event, rather than performing a series of get-and-compare sequences, the thread updates a wake-and-go array with a target address associated with the event. The wake-and-go mechanism may save the state of the thread in a hardware private array. The hardware private array may comprise a plurality of memory cells embodied within the processor or pervasive logic associated with the bus, for example. Alternatively, the hardware private array may be embodied within logic associated with the wake-and-go storage array.

    摘要翻译: 为数据处理系统提供了一个唤醒机制。 当一个线程正在等待一个事件,而不是执行一系列获取和比较序列,线程将更新一个唤醒数组与一个与事件关联的目标地址。 唤醒机制可以将线程的状态保存在硬件专用阵列中。 例如,硬件私有阵列可以包括体现在处理器内的多个存储器单元或与总线相关联的普遍逻辑。 或者,硬件私有阵列可以体现在与唤醒存储阵列相关联的逻辑内。

    CAM-based wake-and-go snooping engine for waking a thread put to sleep for spinning on a target address lock
    34.
    发明授权
    CAM-based wake-and-go snooping engine for waking a thread put to sleep for spinning on a target address lock 有权
    基于CAM的唤醒式窥探引擎,用于唤醒线程进入目标地址锁中进行睡眠

    公开(公告)号:US08880853B2

    公开(公告)日:2014-11-04

    申请号:US12024327

    申请日:2008-02-01

    摘要: A wake-and-go mechanism is provided for a data processing system. The wake-and-go mechanism recognizes a programming idiom that indicates that a thread is spinning on a lock. The wake-and-go mechanism updates a wake-and-go array with a target address associated with the lock and sets a lock bit in the wake-and-go array. The thread then goes to sleep until the lock frees. The wake-and-go array may be a content addressable memory (CAM). When a transaction appears on the symmetric multiprocessing (SMP) fabric that modifies the value at a target address in the CAM, the CAM returns a list of storage addresses at which the target address is stored. The wake-and-go mechanism associates these storage addresses with the threads waiting for an event at the target addresses, and may wake the thread that is spinning on the lock.

    摘要翻译: 为数据处理系统提供了一个唤醒机制。 唤醒机制识别一个编程习惯,表示一个线程正在旋转锁定。 唤醒机制使用与锁相关联的目标地址更新唤醒阵列,并在wake-and-go阵列中设置锁定位。 线程然后去睡觉,直到锁释放。 唤醒阵列可以是内容可寻址存储器(CAM)。 当对称多处理(SMP)结构出现在CAM中的目标地址上修改值时,CAM返回存储目标地址的存储地址列表。 唤醒机制将这些存储地址与等待目标地址处的事件的线程相关联,并且可以唤醒正在旋转的线程。

    Programming idiom accelerator to examine pre-fetched instruction streams for multiple processors
    35.
    发明授权
    Programming idiom accelerator to examine pre-fetched instruction streams for multiple processors 有权
    编写习语加速器,以检查多处理器的预取指令流

    公开(公告)号:US08788795B2

    公开(公告)日:2014-07-22

    申请号:US12024364

    申请日:2008-02-01

    IPC分类号: G06F9/00

    摘要: A wake-and-go mechanism may be a programming idiom accelerator. As a processor fetches instructions, the programming idiom accelerator may look ahead to determine whether a programming idiom is coming up in the instruction stream. If the programming idiom accelerator recognizes a programming idiom, the programming idiom accelerator may perform an action to accelerate execution of the programming idiom. In the case of a wake-and-go programming idiom, the programming idiom accelerator may record an entry in a wake-and-go array, for example.

    摘要翻译: 唤醒机制可能是编程习惯加速器。 当处理器获取指令时,编程习惯加速器可以向前看,以确定编程习语是否在指令流中出现。 如果编程习惯加速器识别编程习惯,则编程习惯加速器可以执行加速编程习语的执行的动作。 在唤醒编程习惯的情况下,编程习惯加速器例如可以记录唤醒阵列中的条目。

    Hardware wake-and-go mechanism and content addressable memory with instruction pre-fetch look-ahead to detect programming idioms
    36.
    发明授权
    Hardware wake-and-go mechanism and content addressable memory with instruction pre-fetch look-ahead to detect programming idioms 有权
    硬件唤醒机制和内容可寻址存储器,具有预先读取的指令,以检测编程习惯

    公开(公告)号:US08452947B2

    公开(公告)日:2013-05-28

    申请号:US12024507

    申请日:2008-02-01

    IPC分类号: G06F9/40

    摘要: A hardware wake-and-go mechanism is provided for a data processing system. The wake-and-go mechanism looks ahead in the instruction stream of a thread for programming idioms that indicates that the thread is waiting for an event. The wake-and-go mechanism updates a wake-and-go array with a target address associated with the event for each recognized programming idiom. When the thread reaches a programming idiom, the thread goes to sleep until the event occurs. The wake-and-go array may be a content addressable memory (CAM). When a transaction appears on the symmetric multiprocessing (SMP) fabric that modifies the value at a target address in the CAM, the CAM returns a list of storage addresses at which the target address is stored. The wake-and-go mechanism associates these storage addresses with the threads waiting for an event at the target addresses, and may wake the one or more threads waiting for the event.

    摘要翻译: 为数据处理系统提供硬件唤醒机制。 唤醒机制在针对线程正在等待事件的编程习语的线程的指令流中向前看。 唤醒机制将针对每个识别的编程习语用与事件相关联的目标地址更新一个唤醒数组。 当线程达到编程习惯时,线程进入休眠状态,直到事件发生。 唤醒阵列可以是内容可寻址存储器(CAM)。 当对称多处理(SMP)结构出现在CAM中的目标地址上修改值时,CAM返回存储目标地址的存储地址列表。 唤醒机制将这些存储地址与等待目标地址处的事件的线程相关联,并且可以唤醒等待事件的一个或多个线程。

    Migrating sleeping and waking threads between wake-and-go mechanisms in a multiple processor data processing system
    37.
    发明授权
    Migrating sleeping and waking threads between wake-and-go mechanisms in a multiple processor data processing system 有权
    在多处理器数据处理系统中,在唤醒机制之间迁移睡眠和唤醒线程

    公开(公告)号:US08230201B2

    公开(公告)日:2012-07-24

    申请号:US12425057

    申请日:2009-04-16

    IPC分类号: G06F9/40

    摘要: A wake-and-go mechanism is provided for a data processing system. The wake-and-go mechanism detects a thread running on a first processing unit within a plurality of processing units that is waiting for an event that modifies a data value associated with a target address. The wake-and-go mechanism creates a wake-and-go instance for the thread by populating a wake-and-go storage array with the target address. The operating system places the thread in a sleep state. Responsive to detecting the event that modifies the data value associated with the target address, the wake-and-go mechanism assigns the wake-and-go instance to a second processing unit within the plurality of processing units. The operating system on the second processing unit places the thread in a non-sleep state.

    摘要翻译: 为数据处理系统提供了一个唤醒机制。 唤醒机制检测在等待修改与目标地址相关联的数据值的事件的多个处理单元中的第一处理单元上运行的线程。 唤醒机制通过使用目标地址填充一个唤醒存储阵列,为线程创建一个唤醒实例。 操作系统将线程置于睡眠状态。 响应于检测修改与目标地址相关联的数据值的事件,唤醒机制将唤醒实例分配给多个处理单元内的第二处理单元。 第二处理单元上的操作系统将线程置于非睡眠状态。

    Wake-and-go mechanism with exclusive system bus response
    38.
    发明授权
    Wake-and-go mechanism with exclusive system bus response 有权
    具有独家系统总线响应的唤醒机制

    公开(公告)号:US08015379B2

    公开(公告)日:2011-09-06

    申请号:US12024250

    申请日:2008-02-01

    IPC分类号: G06F12/00

    摘要: A wake-and-go mechanism is configured to issue a look-ahead load command on a system bus to read a data value from a target address and perform a comparison operation to determine whether the data value at the target address indicates that an event for which a thread is waiting has occurred. In response to the comparison resulting in a determination that the event has not occurred, the wake-and-go engine populates the wake-and-go storage array with the target address. In response to the comparison resulting in a determination that the event has occurred, the wake-and-go engine issues a load command on the system bus to read the data value from the target address with data exclusivity and determines whether the wake-and-go engine obtains a lock for the target address. Responsive to obtaining the lock for the target address, the wake-and-go engine holds the lock for the thread.

    摘要翻译: 唤醒机制被配置为在系统总线上发出预先加载命令以从目标地址读取数据值并执行比较操作以确定目标地址上的数据值是否指示用于 一个线程正在等待发生。 响应于比较导致事件未发生的确定,唤醒和引导引擎使用目标地址填充唤醒存储阵列。 响应于导致确定事件已经发生的比较,唤醒引导器在系统总线上发出加载命令以从数据排他性的目标地址读取数据值,并且确定唤醒 - go引擎获取目标地址的锁。 响应于获取目标地址的锁,唤醒引导器保持线程的锁定。

    Compiler Providing Idiom to Idiom Accelerator
    39.
    发明申请
    Compiler Providing Idiom to Idiom Accelerator 有权
    编译器为惯用语加速器提供惯用语

    公开(公告)号:US20110173593A1

    公开(公告)日:2011-07-14

    申请号:US12024347

    申请日:2008-02-01

    IPC分类号: G06F9/45

    CPC分类号: G06F8/4441

    摘要: A wake-and-go mechanism may be a programming idiom accelerator. As a processor fetches instructions, the programming idiom accelerator may look ahead to determine whether a programming idiom is coming up in the instruction stream. If the programming idiom accelerator recognizes a programming idiom, the programming idiom accelerator may perform an action to accelerate execution of the programming idiom. A compiler may recognize programming idioms and expose the programming idioms to the programming idiom accelerator within the resulting machine language instructions.

    摘要翻译: 唤醒机制可能是编程习惯加速器。 当处理器获取指令时,编程习惯加速器可以向前看,以确定编程习语是否在指令流中出现。 如果编程习惯加速器识别编程习惯,则编程习惯加速器可以执行加速编程习语的执行的动作。 编译器可以识别编程习语,并将编程习语暴露给所得到的机器语言指令中的编程习惯加速器。

    Wake-and-Go Mechanism with System Address Bus Transaction Master
    40.
    发明申请
    Wake-and-Go Mechanism with System Address Bus Transaction Master 有权
    唤醒机制与系统地址总线事务主机

    公开(公告)号:US20100287341A1

    公开(公告)日:2010-11-11

    申请号:US12024242

    申请日:2008-02-01

    IPC分类号: G06F12/00 G06F12/02

    摘要: A wake-and-go mechanism is provided for a data processing system. The wake-and-go mechanism is configured to issue a look-ahead load command on a system bus to read a data value from a target address and perform a comparison operation to determine whether the data value at the target address indicates that an event for which a thread is waiting has occurred. In response to the comparison resulting in a determination that the event has not occurred, the wake-and-go engine populates the wake-and-go storage array with the target address and snoops the target address on the system bus.

    摘要翻译: 为数据处理系统提供了一个唤醒机制。 唤醒机制被配置为在系统总线上发出预先加载命令以从目标地址读取数据值并执行比较操作以确定目标地址上的数据值是否指示用于 一个线程正在等待发生。 响应于比较导致事件未发生的确定,唤醒和引导引擎使用目标地址填充唤醒存储阵列并窥探系统总线上的目标地址。