公开(公告)号：US20220020818A1

公开(公告)日：2022-01-20

申请号：US17345423

申请日：2021-06-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinhong KIM ,  Seyun KIM ,  Youngjin CHO

IPC: H01L27/24 ,  H01L45/00 ,  G11C13/00 ,  G11C11/56

Abstract: A vertical nonvolatile memory device including memory cell strings using a resistance change material is provided. Each of the memory cell strings of the nonvolatile memory device includes a semiconductor layer extending in a first direction; a plurality of gates and a plurality of insulators alternately arranged in the first direction; a gate insulating layer extending in the first direction between the plurality of gates and the semiconductor layer and between the plurality of insulators and the semiconductor layer; and a resistance change layer extending in the first direction on a surface of the semiconductor layer. The resistance change layer includes a metal-semiconductor oxide including a mixture of a semiconductor material of the semiconductor layer and a transition metal oxide.

公开(公告)号：US20210035641A1

公开(公告)日：2021-02-04

申请号：US16775424

申请日：2020-01-29

Applicant: Samsung Electronics Co. Ltd.

Inventor： Jungho YOON ,  Seyun KIM ,  Jinhong KIM ,  Soichiro MIZUSAKI ,  Youngjin CHO

IPC: G11C16/10 ,  H01L27/11582 ,  G11C16/24 ,  G11C16/04 ,  G11C16/26

Abstract: Provided are a non-volatile memory device and an operating method thereof. The non-volatile memory device includes a memory cell array having a vertically stacked structure, a bit line for applying a programming voltage to the memory cell array, and a control logic. The memory cell array includes memory cells that each include a corresponding portion of a semiconductor layer and a corresponding portion of a resistance layer. The memory cells include a non-selected memory cell, a compensation memory cell, and a selected memory cell. The control logic is configured to apply an adjusted program voltage to the selected memory cell, based on applying a first voltage to the compensation memory cell, a second voltage to the selected memory cell, and a third voltage to the non-selected memory cell. The adjusted program voltage may be dropped compared to the programming voltage due to the compensation memory cell.