公开(公告)号：US20220392552A1

公开(公告)日：2022-12-08

申请号：US17340826

申请日：2021-06-07

Applicant: SanDisk Technologies LLC

Inventor： Xue Bai Pitner ,  Yu-Chung Lien ,  Deepanshu Dutta ,  Huai-Yuan Tseng ,  Ravi Kumar

IPC: G11C16/34 ,  G11C16/04 ,  G11C16/10

Abstract: A method for programming a memory block of a non-volatile memory structure, wherein the method comprises, during a program verify operation, selecting only a partial segment of memory cells of a memory block for bit scan mode, applying a sensing bias voltage to one or more bit lines of the memory block associated with the selected memory cells, and initiating a bit scan mode of the selected memory cells.

公开(公告)号：US20220375524A1

公开(公告)日：2022-11-24

申请号：US17323708

申请日：2021-05-18

Applicant: SanDisk Technologies LLC

Inventor： Dengtao Zhao ,  Ravi Kumar ,  Chin-Yi Chen ,  Ryohei Shoji

IPC: G11C16/10 ,  G11C16/14 ,  G11C16/34 ,  G11C16/04

Abstract: A nonvolatile memory control method includes a step of writing, repeatedly to a nonvolatile memory cells. The method continues with detecting when writing reaches a writing threshold value. Upon reaching the writing threshold, the method continues with driving a charge to at least one parasitic area intermediate at least two charge storage areas of the nonvolatile memory cells to improve data retention in at least one of the at least two charge storage areas of the nonvolatile memory cells.

公开(公告)号：US20220215873A1

公开(公告)日：2022-07-07

申请号：US17142753

申请日：2021-01-06

Applicant: SanDisk Technologies LLC

Inventor： Sujjatul Islam ,  Muhammad Masuduzzaman ,  Ravi Kumar

IPC: G11C11/56 ,  G11C16/04 ,  G11C16/10

Abstract: A method for programming a non-volatile memory structure with four-page data, wherein the method comprises, in a first stage, selecting four programmable states of a segment of MLC NAND-type memory cells, programming at least a first of the four programmable states with two pages of a four-page data at a first step voltage level, between programming at least two neighboring programmable states of the four programmable states, increasing the first step voltage level to a second step voltage level for a single program pulse and according to a pre-determined magnitude, and programming a latter of the at least two neighboring programmable states at the first step voltage level.

公开(公告)号：US20220208285A1

公开(公告)日：2022-06-30

申请号：US17137871

申请日：2020-12-30

Applicant: SanDisk Technologies LLC

Inventor： Ravi Kumar ,  Deepanshu Dutta

IPC: G11C16/34 ,  G11C16/10 ,  G11C16/26 ,  G11C16/30 ,  G11C16/08 ,  G11C16/24

Abstract: A memory device comprising control circuitry configured to apply a first program voltage to a selected word line, wherein a first subset of memory cells of the selected word line, that correspond to a first set of data states, are inhibited from being programmed with the first program voltage, and wherein the first program voltage is applied to a second subset of memory cells corresponding to a second set of data states. The control circuitry is further configured to cause a first voltage of the selected word line to discharge to a second voltage level corresponding to a second program voltage such that the second program voltage is applied to at least the first subset of memory cells. The control circuitry is further configured to perform a verify operation to verify whether the first subset of memory cells and the second subset of memory cells have completed programming.