Structure and fabrication of field-effect transistor using empty well in combination with source/drain extensions or/and halo pocket
    31.
    发明授权
    Structure and fabrication of field-effect transistor using empty well in combination with source/drain extensions or/and halo pocket 有权
    使用空穴与源极/漏极延伸部分或/和晕圈组合的场效应晶体管的结构和制造

    公开(公告)号:US08410549B2

    公开(公告)日:2013-04-02

    申请号:US12382968

    申请日:2009-03-27

    Abstract: Insulated-gate field-effect transistors (“IGFETs”), both symmetric and asymmetric, suitable for a semiconductor fabrication platform that provides IGFETs for analog and digital applications, including mixed-signal applications, utilize empty-well regions in achieving high performance. A relatively small amount of semiconductor well dopant is near the top of each empty well. Each IGFET (100, 102, 112, 114, 124, or 126) has a pair of source/drain zones laterally separated by a channel zone of body material of the empty well (180, 182, 192, 194, 204, or 206). A gate electrode overlies a gate dielectric layer above the channel zone. Each source/drain zone (240, 242, 280, 282, 520, 522, 550, 552, 720, 722, 752, or 752) has a main portion (240M, 242M, 280M, 282M, 520M, 522M, 550M, 552M, 720M, 722M, 752M, or 752M) and a more lightly doped lateral extension (240E, 242E, 280E, 282E, 520E, 522E, 550E, 552E, 720E, 722E, 752E, or 752E). Alternatively or additionally, a more heavily doped pocket portion (250 or 290) of the body material extends along one of the source/drain zones. When present, the pocket portion typically causes the IGFET to be an asymmetric device.

    Abstract translation: 对称和非对称的绝缘栅场效应晶体管(IGFET)适用于为模拟和数字应用(包括混合信号应用)提供IGFET的半导体制造平台,利用空井区域实现高性能。 相对少量的半导体阱掺杂剂在每个空的孔的顶部附近。 每个IGFET(100,102,112,114,124或126)具有由空井(180,182,192,194,204或206)的主体材料的通道区横向隔开的一对源/排出区 )。 栅极电极覆盖在沟道区上方的栅极电介质层。 每个源/漏区(240,242,282,282,520,522,550,552,720,722,752或752)具有主要部分(240M,242M,280M,282M,520M,522M,550M, 552M,720M,722M,752M或752M)和更轻掺杂的侧向延伸部(240E,242E,280E,282E,520E,522E,550E,552E,720E,722E,752E或752E)。 替代地或另外地,主体材料的更加掺杂的凹穴部分(250或290)沿着源极/漏极区域中的一个延伸。 当存在时,口袋部分通常使IGFET成为非对称装置。

    Configuration and Fabrication of Semiconductor Structure in Which Source and Drain Extensions of Field-effect Transistor Are Defined with Different Dopants
    32.
    发明申请
    Configuration and Fabrication of Semiconductor Structure in Which Source and Drain Extensions of Field-effect Transistor Are Defined with Different Dopants 有权
    使用不同掺杂剂定义场效应晶体管的源极和漏极扩展的半导体结构的配置和制造

    公开(公告)号:US20120184077A1

    公开(公告)日:2012-07-19

    申请号:US13100192

    申请日:2011-05-03

    Abstract: An insulated-gate field-effect transistor (100) provided along an upper surface of a semiconductor body contains a pair of source/drain zones (240 and 242) laterally separated by a channel zone (244). A gate electrode (262) overlies a gate dielectric layer (260) above the channel zone. Each source/drain zone includes a main portion (240M or 242M) and a more lightly doped lateral extension (240E or 242E) laterally continuous with the main portion and extending laterally under the gate electrode. The lateral extensions, which terminate the channel zone along the upper semiconductor surface, are respectively largely defined by a pair of semiconductor dopants of different atomic weights. With the transistor being an asymmetric device, the source/drain zones constitute a source and a drain. The lateral extension of the source is then more lightly doped than, and defined with dopant of higher atomic weight, than the lateral extension of the drain.

    Abstract translation: 沿着半导体主体的上表面设置的绝缘栅场效应晶体管(100)包含由沟道区(244)横向隔开的一对源极/漏极区(240和242)。 栅电极(262)覆盖沟道区上方的栅介电层(260)。 每个源极/漏极区域包括主要部分(240M或242M)和与主要部分横向连续并在栅电极下方横向延伸的更轻掺杂的横向延伸部(240E或242E)。 沿着上半导体表面终止沟道区的横向延伸部分分别由不同原子量的一对半导体掺杂剂限定。 在晶体管是非对称器件的情况下,源极/漏极区域构成源极和漏极。 源极的横向延伸比起漏极的横向延伸稍微掺杂,并且由原子量较高的掺杂剂限定。

    Configuration and Fabrication of Semiconductor Structure Having Bipolar Junction Transistor in Which Non-monocrystalline Semiconductor Spacing Portion Controls Base-link Length
    33.
    发明申请
    Configuration and Fabrication of Semiconductor Structure Having Bipolar Junction Transistor in Which Non-monocrystalline Semiconductor Spacing Portion Controls Base-link Length 有权
    具有双极结晶体管的半导体结构的配置和制造,其中非单晶半导体间隔部分控制基链长度

    公开(公告)号:US20120181619A1

    公开(公告)日:2012-07-19

    申请号:US13198601

    申请日:2011-08-04

    CPC classification number: H01L27/0623 H01L21/82285 H01L21/8249 H01L27/0826

    Abstract: A semiconductor structure contains a bipolar transistor (101) and a spacing structure (265-1 or 265-2). The transistor has an emitter (241), a base (243), and a collector (245). The base is formed with an intrinsic base portion (243I), a base link portion (243L), and a base contact portion (245C). The intrinsic base portion is situated below the emitter and above material of the collector. The base link portion extends between the intrinsic base portion and the base contact portions. The spacing structure includes an isolating dielectric layer (267-1 or 267-2) and a spacing component. The dielectric layer extends along the upper semiconductor surface. The spacing component includes a lateral spacing portion (269-1 or 269-2) of largely non-monocrystalline semiconductor material, preferably polycrystalline semiconductor material, situated on the dielectric layer above the base link portion. Opposite first and second upper edges of the lateral spacing portion (275-1 and 277-1) laterally conform to opposite first and second lower edges (297-1 and 299-1) of the base link portion so as to determine, and thereby control, its length.

    Abstract translation: 半导体结构包含双极晶体管(101)和间隔结构(265-1或265-2)。 晶体管具有发射极(241),基极(243)和集电极(245)。 基部形成有本征基部(243I),基部连接部(243L)和基部接触部(245C)。 本征基部位于发射极之下和集电极材料之上。 基部连接部在本征基部与基部接触部之间延伸。 间隔结构包括隔离电介质层(267-1或267-2)和间隔部件。 电介质层沿着上半导体表面延伸。 间隔部件包括位于基部连接部分上方的电介质层上的大部分非单晶半导体材料(优选多晶半导体材料)的侧向间隔部分(269-1或269-2)。 横向间隔部分(275-1和277-1)的相对的第一和第二上边缘横向地与基部连杆部分的相对的第一和第二下边缘(297-1和299-1)相一致,以便确定,从而 控制,其长度。

    Structure and Fabrication of Field-effect Transistor for Alleviating Short-channel Effects and/or Reducing Junction Capacitance
    34.
    发明申请
    Structure and Fabrication of Field-effect Transistor for Alleviating Short-channel Effects and/or Reducing Junction Capacitance 审中-公开
    用于缓解短沟道效应和/或降低结电容的场效晶体管的结构和制造

    公开(公告)号:US20120181614A1

    公开(公告)日:2012-07-19

    申请号:US13309473

    申请日:2011-12-01

    Abstract: An IGFET (40 or 42) has a channel zone (64 or 84) situated in body material (50). Short-channel threshold voltage roll-off and punchthrough are alleviated by arranging for the net dopant concentration in the channel zone to longitudinally reach a local surface minimum at a location between the IGFET's source/drain zones (60 and 62 or 80 and 82) and by arranging for the net dopant concentration in the body material to reach a local subsurface maximum more than 0.1 μm deep into the body material but not more than 0.1 μm deep into the body material. The source/drain zones (140 and 142 or 160 and 162) of a p-channel IGFET (120 or 122) are provided with graded-junction characteristics to reduce junction capacitance, thereby increasing switching speed.

    Abstract translation: IGFET(40或42)具有位于主体材料(50)中的通道区(64或84)。 通过设置通道区域中的净掺杂剂浓度以在IGFET的源极/漏极区域(60和62或80和82)之间的位置处纵向达到局部表面最小值来减轻短通道阈值电压滚降和穿透,以及 通过排列主体材料中的净掺杂剂浓度达到主体材料深度超过0.1μm的局部表面最大深度,但不超过体积材料的0.1μm深。 p沟道IGFET(120或122)的源极/漏极区(140和142或160和162)具有渐变结特征以减小结电容,从而提高开关速度。

    Structure and fabrication of insulated-gate field-effect transistor with hypoabrupt change in body dopant concentration below source/drain zone
    35.
    发明授权
    Structure and fabrication of insulated-gate field-effect transistor with hypoabrupt change in body dopant concentration below source/drain zone 有权
    绝缘栅场效应晶体管的结构和制造,体源掺杂浓度低于源极/漏极区域,具有低反变化

    公开(公告)号:US08148777B1

    公开(公告)日:2012-04-03

    申请号:US12883147

    申请日:2010-09-15

    Abstract: An insulated-gate field-effect transistor (100, 100V, 140, 150, 150V, 160, 170, 170V, 180, 180V, 190, 210, 210W, 500, 510, or 530; or 220, 220W, or 540) is provided with a hypoabrupt vertical dopant profile below one (104; or 264 or 564) of its source/drain zones for reducing the parasitic capacitance along the pn junction between that source/drain zone and adjoining body material (108; or 268 or 568). In particular, the concentration of semiconductor dopant which defines the conductivity type of the body material increases by at least a factor of 10 in moving from that source/drain zone down to an underlying body-material location no more than 10 times deeper below the upper semiconductor surface than that source/drain zone.

    Abstract translation: 绝缘栅场效应晶体管(100,100V,140,150,150V,160,170,170V,180,180V,190,210,210W,500,510或530;或220,220W或540) 在其源极/漏极区的一个(104或264或564)的下方设置有低破坏的垂直掺杂剂轮廓,用于减小沿着该源极/漏极区与相邻主体材料(108;或268或568)之间的pn结的寄生电容 )。 特别地,限定主体材料的导电类型的半导体掺杂剂的浓度在从该源极/漏极区向下移动到下面的物体 - 物质位置之前至少增加10倍,不超过上部的10倍 半导体表面比该源/漏区。

    Fabrication of semiconductor architecture having field-effect transistors especially suitable for analog applications
    37.
    发明授权
    Fabrication of semiconductor architecture having field-effect transistors especially suitable for analog applications 有权
    具有特别适用于模拟应用的场效应晶体管的半导体架构的制造

    公开(公告)号:US07972918B1

    公开(公告)日:2011-07-05

    申请号:US12545014

    申请日:2009-08-20

    Abstract: A semiconductor structure is provided with (i) an empty well having relatively little well dopant near the top of the well and (ii) a filled well having considerably more well dopant near the top of the well. Each well is defined by a corresponding body-material region (108 or 308) of a selected conductivity type. The regions respectively meet overlying zones (104 and 304) of the opposite conductivity type. The concentration of well dopant of the selected conductivity type locally reaches a maximum in each body-material region at a location no more than 10 times deeper below the upper semiconductor surface than the overlying zone's depth, decreases by at least a factor of 10 in moving from the empty-well maximum-concentration location through the overlying zone to the upper surface, and reaches at least one other maximum in moving from the filled-well maximum-concentration location through the other zone to the upper surface.

    Abstract translation: 半导体结构设置有(i)在井的顶部附近具有相对少的阱掺杂物的空阱,以及(ii)在阱的顶部附近具有相当好的掺杂剂的填充阱。 每个孔由所选择的导电类型的对应的主体材料区域(108或308)限定。 这些区域分别满足相反导电类型的覆盖区域(104和304)。 所选择的导电类型的阱掺杂剂的浓度在上半导体表面以上的深度比上覆层的深度低10倍的位置在每个主体材料区域局部达到最大值,在移动中减小至少10倍 从空井最大浓度位置通过上覆区域到上表面,并且从填充井最大浓度位置通过另一区域移动到上表面时达到至少另一个最大值。

    Insulated-gate field-effect transistor with hypoabrupt step change in body dopant concentration below source/drain zone
    38.
    发明授权
    Insulated-gate field-effect transistor with hypoabrupt step change in body dopant concentration below source/drain zone 有权
    绝缘栅场效应晶体管的体积掺杂浓度低于源极/漏极区,具有低反应阶跃变化

    公开(公告)号:US07838930B1

    公开(公告)日:2010-11-23

    申请号:US11977213

    申请日:2007-10-23

    Abstract: An insulated-gate field-effect transistor (500, 510, 530, or 540) has a hypoabrupt step-change vertical dopant profile below one (104 or 564) of its source/drain zones for reducing the parasitic capacitance along the pn junction between that source/drain zone and adjoining body material (108 or 568). In particular, the concentration of semiconductor dopant which defines the conductivity type of the body material largely undergoes a step increase by at least a factor of 10 in moving from that source/drain zone down to an underlying body-material location no more than 10 times deeper below the upper semiconductor surface than that source/drain zone.

    Abstract translation: 绝缘栅场效应晶体管(500,510,530或540)在其源极/漏极区的一个(104或564)下方具有低于一个(104或564)的垂直掺杂剂轮廓,用于减小沿pn结的寄生电容 该源极/漏极区域和相邻的主体材料(108或568)。 特别地,限定主体材料的导电类型的半导体掺杂剂的浓度在从该源极/漏极区向下移动到下面的主体 - 材料位置时,会大大增加至少10倍,不超过10倍 比上部半导体表面更深于该源/漏区。

    Fabrication of like-polarity insulated-gate field-effect transistors having multiple vertical body dopant concentration maxima and different halo pocket characteristics
    40.
    发明授权
    Fabrication of like-polarity insulated-gate field-effect transistors having multiple vertical body dopant concentration maxima and different halo pocket characteristics 有权
    具有多个垂直体掺杂浓度最大值和不同晕圈特征的同极性绝缘栅场效应晶体管的制造

    公开(公告)号:US07595244B1

    公开(公告)日:2009-09-29

    申请号:US11975042

    申请日:2007-10-16

    Abstract: Fabrication of two differently configured like-polarity insulated-gate field-effect transistors (40 or 42 and 240 or 242) entails introducing multiple body-material semiconductor dopants of the same conductivity type into a semiconductor body. Gate electrodes (74 or 94) are defined such that each body-material dopant reaches a maximum concentration below the channel surface depletion regions, below all gate-electrode material overlying the channel zones (64 or 84), and at a different depth than each other body-material dopant. The transistors are provided with source/drain zones (60 or 80) of opposite conductivity type to, and with halo pocket portions of the same conductivity type as, the body-material dopants. One pocket portion (100/102 or 104) extends along both source/drain zones of one of the transistors. Another pocket portion (244 or 246) extends largely along only one of the source/drain zones of the other transistor so that it is asymmetrical.

    Abstract translation: 两个不同构造的同极性绝缘栅场效应晶体管(40或42和240或242)的制造需要将相同导电类型的多个体材料半导体掺杂剂引入半导体本体。 限定栅电极(74或94),使得每个主体材料掺杂剂在沟道表面耗尽区下方达到最大浓度,低于覆盖沟道区(64或84)的所有栅电极材料,并且在不同于每个 其他体材料掺杂剂。 晶体管具有与体材料掺杂剂相同的导电类型的源极/漏极区(60或80)以及具有相同导电类型的卤素口袋部分。 一个口袋部分(100/102或104)沿着一个晶体管的源极/漏极区域延伸。 另一个口袋部分(244或246)沿着另一个晶体管的源极/漏极区域中的一个较大地延伸,使得它是不对称的。

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