公开(公告)号：US06927830B2

公开(公告)日：2005-08-09

申请号：US10178016

申请日：2002-06-20

申请人： Woo-Suk Chung ,  Chi-Woo Kim ,  Bo-Young An ,  Hyong-Gon Lee ,  Sung-Hee Cho

发明人： Woo-Suk Chung ,  Chi-Woo Kim ,  Bo-Young An ,  Hyong-Gon Lee ,  Sung-Hee Cho

IPC分类号： G02F1/1337 ,  G02F1/1333 ,  G02F1/1335 ,  G02F1/1343 ,  G02F1/1345 ,  G02F1/1362 ,  G09G3/30 ,  G09G3/36

CPC分类号： G02F1/133512 ,  G02F1/134336 ,  G02F1/1345 ,  G02F2001/133337 ,  G02F2001/133388 ,  G02F2001/133397 ,  G09G3/3648 ,  G09G2330/08 ,  G09G2330/10

摘要： In a liquid crystal display, a plurality of gate lines and data lines are provided on a first substrate including a display area as a screen, and a peripheral area external to the display area wherein a plurality of pixel electrodes are electrically connected to the gate lines and to the data lines, and some of the pixel electrodes extend to be located in the peripheral area; and optionally, a black matrix is formed on a second substrate disposed opposite to the first substrate for screening the extended portions of the pixel electrodes located in the peripheral area, a rubbing direction of aligning films is formed on the first and the second substrates towards the extended portions of the pixel electrodes located in the peripheral area so that impurity ions on the surface of the aligning film travel along the rubbing direction to stop at the extended portions of the pixel electrodes, and an image defect area caused by the impurity ions is screened with the black matrix.

摘要翻译： 在液晶显示器中，多个栅极线和数据线设置在包括显示区域作为屏幕的第一基板上，以及在显示区域外部的外围区域，其中多个像素电极电连接到栅极线 和数据线，并且一些像素电极延伸到位于周边区域中; 并且可选地，在与第一基板相对设置的第二基板上形成黑矩阵，用于屏蔽位于周边区域中的像素电极的延伸部分，在第一和第二基板上形成定向膜的摩擦方向朝向 位于周边区域中的像素电极的延伸部分，使得取向膜表面上的杂质离子沿着摩擦方向行进，以在像素电极的延伸部分处停止，并且筛选由杂质离子引起的图像缺陷区域 与黑色矩阵。

公开(公告)号：US06630688B2

公开(公告)日：2003-10-07

申请号：US09837374

申请日：2001-04-19

申请人： Hyang-Shik Kong ,  Myung-Koo Hur ,  Chi-Woo Kim

发明人： Hyang-Shik Kong ,  Myung-Koo Hur ,  Chi-Woo Kim

IPC分类号： H01L2904

CPC分类号： G02F1/13439 ,  G02F1/13458 ,  H01L21/76801 ,  H01L21/76838 ,  H01L23/53209 ,  H01L27/12 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/458 ,  H01L2924/0002 ,  H01L2924/00

摘要： First, a conductive material of aluminum-based material is deposited and patterned to form a gate wire including a gate line, a gate pad, and a gate electrode. A gate insulating layer is formed by depositing nitride silicon in the range of more than 300° C. for 5 minutes, and a semiconductor layer an ohmic contact layer are sequentially formed. Next, a conductor layer of a metal such as Cr is deposited and patterned to form a data wire include a data line intersecting the gate line, a source electrode, a drain electrode and a data pad. Then, a passivation layer is deposited and patterned to form contact holes exposing the drain electrode, the gate pad and the data pad. Next, indium zinc oxide is deposited and patterned to form a pixel electrode, a redundant gate pad and a redundant data pad respectively connected to the drain electrode, the gate pad and the data pad.

摘要翻译： 首先，将铝基材料的导电材料沉积并图案化以形成包括栅极线，栅极焊盘和栅电极的栅极线。 通过在大于300℃的范围内沉积氮化硅5分钟形成栅极绝缘层，并依次形成半导体层欧姆接触层。 接下来，沉积并图案化诸如Cr的金属的导体层以形成数据线，其包括与栅极线相交的数据线，源电极，漏电极和数据焊盘。 然后，沉积并图案化钝化层以形成暴露漏电极，栅极焊盘和数据焊盘的接触孔。 接下来，沉积并图案化氧化铟锌以形成分别连接到漏电极，栅极焊盘和数据焊盘的像素电极，冗余栅极焊盘和冗余数据焊盘。

公开(公告)号：US06570182B2

公开(公告)日：2003-05-27

申请号：US10190494

申请日：2002-07-09

申请人： Chang-Oh Jeong ,  Yang-Sun Kim ,  Myung-Koo Hur ,  Young-Jae Tak ,  Mun-Pyo Hong ,  Chi-Woo Kim ,  Jang-Soo Kim ,  Chun-Gi You

发明人： Chang-Oh Jeong ,  Yang-Sun Kim ,  Myung-Koo Hur ,  Young-Jae Tak ,  Mun-Pyo Hong ,  Chi-Woo Kim ,  Jang-Soo Kim ,  Chun-Gi You

IPC分类号： H01L2904

CPC分类号： G02F1/136286 ,  G02F1/136227 ,  G02F1/1368 ,  G02F2001/13629 ,  H01L21/28008 ,  H01L23/4827 ,  H01L29/42384 ,  H01L29/4908 ,  H01L2924/0002 ,  H01L2924/00

摘要： The Mo or MoW composition layer has a low resistivity of less than 15 &mgr;&OHgr;cm and is etched to have a smooth taper angle using an Al alloy enchant or a Cr enchant, and the Mo or MoW layer is used for a wiring of a display or a semiconductor display along with an Al layer or a Cr layer. Since the Mo or MoW layer can be deposited so as to give low stress to the substrate by adjusting the deposition pressure, a single MoW layer can be used as a wiring by itself. When contact holes are formed in the passivation layer or the gate insulating layer, a lateral etch is reduced by using polymer layer, an etch gas system using CF4+O2 can prevent the etch of the Mo or MoW alloy layer, and an etch gas of SF6+HCl (+He) or SF6+Cl2 (+He) can form the edge profile of contact holes to be smoothed. Also, when an amorphous silicon layer formed under the Mo or MoW layer is etched using the Mo or MoW layer as a mask, using an etch gas system that employs a gas such as hydrogen halide and at least one gas selected from CF4, CHF3, CHClF2, CH3F, and C2F6, yields good TFT characteristics, and H2 plasma treatment can further improve the TFT characteristics.

公开(公告)号：US6081308A

公开(公告)日：2000-06-27

申请号：US31445

申请日：1998-02-26

申请人： Chang-Oh Jeong ,  Yang-Sun Kim ,  Myung-Koo Hur ,  Young-Jae Tak ,  Mun-Pyo Hong ,  Chi-Woo Kim ,  Jueng-Gil Lee

发明人： Chang-Oh Jeong ,  Yang-Sun Kim ,  Myung-Koo Hur ,  Young-Jae Tak ,  Mun-Pyo Hong ,  Chi-Woo Kim ,  Jueng-Gil Lee

IPC分类号： G02F1/1362 ,  G02F1/1368 ,  H01L21/28 ,  H01L23/482 ,  H01L29/423 ,  H01L29/49 ,  G02F1/136 ,  G02F1/1343 ,  H01L23/48 ,  H01L29/04

CPC分类号： G02F1/1368 ,  G02F1/136286 ,  H01L21/28008 ,  H01L23/4827 ,  H01L29/42384 ,  H01L29/4908 ,  G02F1/136227 ,  G02F2001/13629 ,  H01L2924/0002

摘要： Since Mo or MoW layer can be deposited so as to give low stress to the substrate by adjusting the deposition pressure, a single Mo or MoW layer can be used as a wiring by itself of large scale and high resolution liquid crystal. The Mo or MoW layer has the low resistivity of less than 15 .mu..OMEGA.cm and is etched to have a smooth taper angle using an Al etchant with Al or Al alloy. Therefore, it is possible to reduce the number of photolithography processes and to prevent a battery effect and generation of a hillock.

摘要翻译： 由于通过调整沉积压力可以沉积Mo或MoW层以便对衬底施加低应力，所以可以使用单个Mo或MoW层作为大规模和高分辨率液晶本身的布线。 Mo或MoW层具有小于15微米欧米伽厘米的低电阻率，并且使用Al或Al合金的Al蚀刻剂被蚀刻以具有平滑的锥角。 因此，可以减少光刻工艺的数量并防止电池效应和产生小丘。