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公开(公告)号:US11023374B2
公开(公告)日:2021-06-01
申请号:US16263117
申请日:2019-01-31
Applicant: SILICON MOTION, INC.
Inventor: Shen-Ting Chiu
IPC: G06F12/06 , G06F12/02 , G06F16/901 , G06F12/1009 , G06F12/12
Abstract: The invention introduces an apparatus for controlling data access that includes a memory, an access interface and a processing unit. The processing unit is arranged to operably receive logical-to-physical (L2P) mapping information corresponding to a programming operation through the access interface and store the L2P mapping information in the memory; searching the L2P mapping information to obtain a first logical address associated with user data stored in space of each physical address and a second logical address associated with user data stored in space of each next physical address; generating content of a plurality of entries of a link-based L2P mapping sub-table in the order of logical addresses, wherein each entry of the link-based L2P mapping sub-table stores information about a physical address and a second logical address associated with a corresponding first logical address; and store the link-based L2P mapping sub-table.
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公开(公告)号:US10936513B2
公开(公告)日:2021-03-02
申请号:US16854065
申请日:2020-04-21
Applicant: Silicon Motion, Inc.
Inventor: Shen-Ting Chiu
Abstract: The invention introduces a method for executing host input-output (IO) commands, performed by a processing unit of a device side when loading and executing program code of a first layer, at least including: receiving a host IO command from a host side through a frontend interface; generating a slot bit table (SBT) including an entry according to the host IO command; creating a thread of a second layer; and sending addresses of callback functions and the SBT to the thread of the second layer, thereby enabling the thread of the second layer to call the callback functions according to the IO operation of the SBT for driving the frontend interface to interact with the host side to transmit user data read from a storage unit to the host side, or receive user data to be programmed into the storage unit from the host side.
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公开(公告)号:US10776228B2
公开(公告)日:2020-09-15
申请号:US16016089
申请日:2018-06-22
Applicant: Silicon Motion, Inc.
Inventor: Kuan-Yu Ke , Guan-Yao Huang , Shen-Ting Chiu
Abstract: A data storage device includes a flash memory, a controller and a random-access memory. The flash memory includes a plurality of planes, and each plane includes a plurality of blocks. A portion of blocks in each of the planes constitutes a super block, so that the flash memory includes a plurality of super blocks. The controller is coupled to the flash memory. When a first block of at least one first super block of the super blocks is damaged, and a second block of a second super block in the position corresponding to the damaged block is normal, the controller merges the second block of the second super block with the first super block to replace the first block. The random-access memory stores a compression table to record position information about the first block in the first super block and the number information of the second block.
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公开(公告)号:US10509566B2
公开(公告)日:2019-12-17
申请号:US15863892
申请日:2018-01-06
Applicant: Silicon Motion, Inc.
Inventor: Shen-Ting Chiu
Abstract: A data storage device with high efficiency, using a transport protocol core and a trigger machine. The transport protocol core is provided for the data storage device to communicate with a host. According to firmware of the data storage device, an operational schedule for the transport protocol core is pre-stored in the trigger machine. Instead of being triggered according to the firmware of the data storage device, the transport protocol core is triggered by the trigger machine to operate according to the operational schedule pre-stored in the trigger machine.
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公开(公告)号:US10387076B2
公开(公告)日:2019-08-20
申请号:US15403976
申请日:2017-01-11
Applicant: Silicon Motion, Inc.
Inventor: Shen-Ting Chiu
Abstract: The invention introduces a method for scheduling data-programming tasks, performed by a processing unit, including at least the following steps. At least one task of an (i+1)-th batch is performed between directing an engine to perform a task of an i-th batch and reception of an outcome of the task of the i-th batch.
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公开(公告)号:US20190155507A1
公开(公告)日:2019-05-23
申请号:US15948997
申请日:2018-04-09
Applicant: Silicon Motion Inc.
Inventor: Chang-Kai Cheng , Shen-Ting Chiu , Jing-Yi Chen
IPC: G06F3/06 , G06F12/1009
Abstract: A method for performing system backup in a memory device, the associated memory device and the controller thereof, and the associated electronic device are provided. The memory device includes a non-volatile (NV) memory including at least one NV memory element. The method may include: writing system information of the memory device at a plurality of locations within the NV memory to make the system information be stored at a first location and a second location within the plurality of locations, respectively, wherein the system information is internal control information of the memory device, and the system information stored at the second location is equivalent to that stored at the first location; and when the system information stored at the first location is not available, reading the system information stored at the second location to control the memory device to operate according to the system information read from the second location.
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公开(公告)号:US20180081796A1
公开(公告)日:2018-03-22
申请号:US15694416
申请日:2017-09-01
Applicant: Silicon Motion, Inc.
Inventor: Shen-Ting Chiu
CPC classification number: G06F12/0246 , G06F2212/2022 , G06F2212/7202 , G11C16/102
Abstract: The present invention provides a data storage device including a flash memory and a controller. The controller receives a plurality of write commands and a plurality of data sectors from the host. During the period of receiving the data sectors, the controller records that the received data sectors have not been confirmed when the total size of received data sectors has not yet reached a predetermined size, writes a plurality of specific data sectors of the data sectors, which have been received from the host, into the flash memory and transmits a plurality of write-confirm signals corresponding to the specific data sectors to the host when the total size of received data has reached the predetermined size.
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