公开(公告)号：US20060226918A1

公开(公告)日：2006-10-12

申请号：US11394013

申请日：2006-03-30

申请人： Alexander Belitzer ,  Stefan Herzinger ,  Giuseppe Puma

发明人： Alexander Belitzer ,  Stefan Herzinger ,  Giuseppe Puma

IPC分类号： H03L7/00

CPC分类号： H03L7/00 ,  H03B5/1212 ,  H03B5/1228 ,  H03B5/124

摘要： An oscillator is disclosed that is tunable to discrete values, and includes a tuning element which can be connected via a switching device. A rectifier circuit is connected to the output of the oscillator and forms a clock signal from the oscillator signal. The oscillator circuit contains a phase delay circuit having a switching input, a clock signal input which is coupled to the output of the rectifier circuit, and a switching output coupled to the switching device. The phase delay circuit has a comparison circuit for comparison of a phase of the clock signal that is applied to the signal input with a reference phase. This phase delay circuit is designed to emit a switching signal after application of an activation signal to the switching input and after the phase of the clock signal which is applied to the signal input matches the reference phase. In consequence, the switching process is delayed until the step-function response of the output signal of the oscillator does not cause a sudden phase change in the clock signal.

摘要翻译： 公开了可调谐到离散值的振荡器，并且包括可经由开关装置连接的调谐元件。 整流电路连接到振荡器的输出端并形成来自振荡器信号的时钟信号。 振荡器电路包括具有开关输入的相位延迟电路，耦合到整流器电路的输出的时钟信号输入和耦合到开关器件的开关输出。 相位延迟电路具有用于比较施加到具有参考相位的信号输入的时钟信号的相位的比较电路。 该相位延迟电路被设计成在施加到开关输入的激活信号之后并且在施加到信号输入的时钟信号的相位与参考相位匹配之后发出切换信号。 因此，切换过程被延迟，直到振荡器的输出信号的阶跃函数响应不会引起时钟信号的突然相位变化。

公开(公告)号：US20050190823A1

公开(公告)日：2005-09-01

申请号：US11055740

申请日：2005-02-10

申请人： Stefan Herzinger ,  Christian Munker ,  Burkhard Neurauter

发明人： Stefan Herzinger ,  Christian Munker ,  Burkhard Neurauter

IPC分类号： H04B1/38 ,  H04L7/033 ,  H04L27/00 ,  H04L29/10

CPC分类号： H04L27/0014 ,  H04L2027/0016 ,  H04L2027/0018

摘要： The invention provides an interface apparatus for data recovery which supplies an analog signal (applied to the input and containing data in line with a coding) having a first component and a second component to a signal processor. From this, the signal processor produces a continuous, demodulated data stream. The data stream is supplied to a connected delay unit, whose output is designed to provide the stored data symbols and whose delay in provision can be set by a signal at a control input. The interface allows a digital modulator to be connected to an analog I/Q interface on a baseband unit.

摘要翻译： 本发明提供了一种用于数据恢复的接口装置，其向信号处理器提供具有第一分量和第二分量的模拟信号（应用于输入并包含符合编码的数据）。 由此，信号处理器产生连续的解调数据流。 数据流被提供给连接的延迟单元，其输出被设计为提供所存储的数据符号，并且可以通过控制输入端的信号设置其提供延迟。 该接口允许将数字调制器连接到基带单元上的模拟I / Q接口。

公开(公告)号：US06734708B1

公开(公告)日：2004-05-11

申请号：US09624438

申请日：2000-07-24

申请人： Xiaopin Zhang ,  Stefan Herzinger ,  Helmut Herrmann

发明人： Xiaopin Zhang ,  Stefan Herzinger ,  Helmut Herrmann

IPC分类号： H03I706

CPC分类号： G05F3/222 ,  H03L7/0895

摘要： A controllable current source circuit and a phase locked loop contained such a circuit are disclosed. The current source circuit such a single switched driver stage for a switched actuation of the loop filter. A continuously switched-on driver stage is introduced into one of several paths of the current source circuit, so that a continuously weaker current is drawn by the loop filter. The currents are preferably stabilized via a current mirror circuit.

摘要翻译： 公开了一种包含这种电路的可控电流源电路和锁相环。 电流源电路是用于环路滤波器的切换致动的单个开关驱动级。 将连续接通的驱动级引入到电流源电路的几条路径之一中，使得环路滤波器画出不断变弱的电流。 电流优选通过电流镜电路稳定。