摘要:
An oscillator is disclosed that is tunable to discrete values, and includes a tuning element which can be connected via a switching device. A rectifier circuit is connected to the output of the oscillator and forms a clock signal from the oscillator signal. The oscillator circuit contains a phase delay circuit having a switching input, a clock signal input which is coupled to the output of the rectifier circuit, and a switching output coupled to the switching device. The phase delay circuit has a comparison circuit for comparison of a phase of the clock signal that is applied to the signal input with a reference phase. This phase delay circuit is designed to emit a switching signal after application of an activation signal to the switching input and after the phase of the clock signal which is applied to the signal input matches the reference phase. In consequence, the switching process is delayed until the step-function response of the output signal of the oscillator does not cause a sudden phase change in the clock signal.
摘要:
An oscillator is disclosed that is tunable to discrete values, and includes a tuning element which can be connected via a switching device. A rectifier circuit is connected to the output of the oscillator and forms a clock signal from the oscillator signal. The oscillator circuit contains a phase delay circuit having a switching input, a clock signal input which is coupled to the output of the rectifier circuit, and a switching output coupled to the switching device. The phase delay circuit has a comparison circuit for comparison of a phase of the clock signal that is applied to the signal input with a reference phase. This phase delay circuit is designed to emit a switching signal after application of an activation signal to the switching input and after the phase of the clock signal which is applied to the signal input matches the reference phase. In consequence, the switching process is delayed until the step-function response of the output signal of the oscillator does not cause a sudden phase change in the clock signal.
摘要:
A circuit arrangement includes a signal processing unit and a regulation unit. The signal processing unit processes an input signal to form an analog output signal. The regulation unit is coupled to the signal processing unit in order to produce a digital regulation signal as a function of the analog output signal for regulation of the analog output signal.
摘要:
In an embodiment, a radio transmitter may be provided. The radio transmitter may include a radio transmitter control loop; and a controller configured in such a way that it operates the radio transmitter control loop as a closed control loop in a first operating mode, and that it operates the radio transmitter control loop as an open control loop in a second operating mode.
摘要:
One embodiment of the present invention relates to a system for calibrating of timing between an amplifier input signal and a modulated supply power. The system includes a supply modulation component, an error metric component, and a delay determiner. The supply modulation component provides the modulated supply power and the amplifier input signal according to an input signal and a set delay signal. The error metric component provides information from a transmitted amplitude signal and a received amplitude signal. The delay determiner generates timing adjustments in the form of the set delay signal from the error metric information.