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公开(公告)号：US11770624B2
公开(公告)日：2023-09-26
申请号：US18072813
申请日：2022-12-01
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Mihir Narendra Mody , Shashank Dabral , Rajasekhar Allu , Niraj Nandan
CPC classification number: H04N23/843 , G06T1/20 , H04N9/67 , H04N2209/046
Abstract: An image signal processor includes a first matrix processing circuit, a post processing circuit, a second matrix processing circuit, and a split visual and analytics circuit. The first matrix processing circuit is configured to receive a plurality of component images generated based on an image captured by an image sensor and generate a plurality of first matrix outputs based on the plurality of component images. The post processing circuit is configured to perform color conversion on the plurality of first matrix outputs to generate a first luminance component of the image and a chrominance component of the image. The second matrix processing circuit is configured to perform color conversion on the plurality of first matrix outputs to generate a second luminance component of the image and a saturation component of the image. The split visual and analytics circuit is configured to generate visual and analytic data of the image.
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公开(公告)号：US20230239585A1
公开(公告)日：2023-07-27
申请号：US18194762
申请日：2023-04-03
Applicant: Texas Instruments Incorporated
Inventor： Gang Hua , Shashank Dabral , Mihir Narendra Mody , Rajasekhar Reddy Allu , Niraj Nandan
CPC classification number: H04N23/88 , H04N9/78 , H04N23/71 , H04N23/76 , H04N23/741
Abstract: Local automatic white balance (AWB) of wide dynamic range (WDR) images is provided. Methods and systems include collecting, by an image signal processor (ISP), statistics for local AWB from at least one wide dynamic range (WDR) image received by the ISP; generating, by a processor, based on the statistics, local gain lookup tables (LUTs), one for each color channel represented in the WDR image(s), each local gain LUT providing a correlation between gain and intensity; and storing the local gain LUTs. Further processing includes, for each of multiple pixels of a WDR image to be output calculating an intensity value, accessing the local gain LUT for the color channel corresponding to that pixel using the calculated intensity value to identify a corresponding local gain value, and applying the local gain value to that pixel.
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公开(公告)号：US20230151941A1
公开(公告)日：2023-05-18
申请号：US18155986
申请日：2023-01-18
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Shashank Dabral , Gavin Perrella , Akeem Whitehead
IPC: F21S41/65 , H05B45/325 , B60Q1/14 , F21S41/675
CPC classification number: F21S41/65 , H05B45/325 , B60Q1/1423 , F21S41/675 , B60Q2300/05
Abstract: An apparatus includes an illumination source including a first illumination source segment and a second illumination source segment. The apparatus also includes driver circuitry coupled to the illumination source, the driver circuitry including a first driver coupled to the first illumination source segment, the first driver configured to produce a first drive signal to instruct the first illumination source segment to produce a first light having a first illumination intensity. The driver circuitry also includes a second driver coupled to the second illumination source segment, the second driver configured to produce a second drive signal to instruct the second illumination source segment to produce a second light having a second illumination intensity.
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34.发明授权公开(公告)号：US11570468B2
公开(公告)日：2023-01-31
申请号：US17520795
申请日：2021-11-08
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Aishwarya Dubey , Shashank Dabral , Veeramanikandan Raju
IPC: H04N19/557 , H04N19/577 , H04N19/567 , G01S17/89 , G01S17/86
Abstract: Frames from an image stream or streams are processed by independently operating digital signal processors (DSPs), with only frame checking microprocessors operating in a lockstep mode. In one example, two DSP are operating on alternate frames. Each DSP processes the frames and produces prediction values for the next frame. The lockstep microprocessors develop their own next frame prediction. The lockstep processors compare issued frames and previously developed predicted frames for consistency. If the predictions are close enough, the issued frame passes the test. The lockstep processors then compare the issued frame to the preceding two frames for a similar consistency check. If the prior frames are also close enough, the issued frame is acceptable. In another example, hardware checkers are provided to compare the present frame with a larger number of prior frames. The hardware checkers provide comparison results to the lockstep processors to compare against allowable variation limits.
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公开(公告)号：US11380046B2
公开(公告)日：2022-07-05
申请号：US16519099
申请日：2019-07-23
Applicant: Texas Instruments Incorporated
Inventor： Shashank Dabral , Vikram Appia , Hemant Hariyani , Lucas Weaver
Abstract: A system on a chip (SoC) includes a digital signal processor (DSP) and a graphics processing unit (GPU) coupled to the DSP. The DSP is configured to receive a stream of received depth measurements and generate a virtual bowl surface based on the stream of received depth measurements. The DSP is also configured to generate a bowl to physical camera mapping based on the virtual bowl surface. The GPU is configured to receive a first texture and receive a second texture. The GPU is also configured to perform physical camera to virtual camera transformation on the first texture and on the second texture, based on the bowl to physical camera mapping, to generate an output image.
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Patent Agency Ranking
公开(公告)号：US11375131B2
公开(公告)日：2022-06-28
申请号：US17001398
申请日：2020-08-24
Applicant: Texas Instruments Incorporated
Inventor： Shashank Dabral , Rajasekhar Reddy Allu
Abstract: Disclosed examples include integrated circuits, merge circuits and methods of processing multiple-exposure image data, in which a single pre-processing circuit is used for pre-processing first input exposure data associated with a first exposure of the image, and then for pre-processing second input exposure data associated with a second exposure of the image, and the first and second pre-processed exposure data are merged to generate merged image data for tone mapping and other post-processing. An example merge circuit includes a configurable gain circuit to apply a gain to the first and/or second exposure data, as well as a configurable weighting circuit with a weight calculation circuit and a motion adaptive filter circuit to compute a first and second weight values for merging the pre-processed first and second exposure data.
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公开(公告)号：US11284050B1
公开(公告)日：2022-03-22
申请号：US17174056
申请日：2021-02-11
Applicant: TEXAS INSTRUMENTS INCORPORATED
Abstract: Described examples include a system including a projector configured to project a test pattern image, the test pattern image having at least two elements; a camera configured to capture the test pattern image; and a controller coupled to the projector and to the camera. The controller is configured to obtain a first calibration matrix between the projector and the camera for the at least two elements; determine at least two epipolar lines based on the first calibration matrix and the test pattern image; determine a cost function based on the at least two epipolar lines and the at least two elements in the test pattern image as captured by the camera; and determine a second calibration matrix responsive to the cost function, wherein at least one of a camera position of the camera or a projector position of the projector is adjusted responsive to the second calibration matrix.
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38.发明授权公开(公告)号：US11172219B2
公开(公告)日：2021-11-09
申请号：US16866647
申请日：2020-05-05
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Aishwarya Dubey , Shashank Dabral , Veeramanikandan Raju
IPC: H04N19/557 , H04N19/577 , G01S17/89 , G01S17/86 , H04N19/567
Abstract: Frames from an image stream or streams are processed by independently operating digital signal processors (DSPs), with only frame checking microprocessors operating in a lockstep mode. In one example, two DSP are operating on alternate frames. Each DSP processes the frames and produces prediction values for the next frame. The lockstep microprocessors develop their own next frame prediction. The lockstep processors compare issued frames and previously developed predicted frames for consistency. If the predictions are close enough, the issued frame passes the test. The lockstep processors then compare the issued frame to the preceding two frames for a similar consistency check. If the prior frames are also close enough, the issued frame is acceptable. In another example, hardware checkers are provided to compare the present frame with a larger number of prior frames. The hardware checkers provide comparison results to the lockstep processors to compare against allowable variation limits.
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公开(公告)号：US11145079B2
公开(公告)日：2021-10-12
申请号：US15879281
申请日：2018-01-24
Applicant: Texas Instruments Incorporated
Inventor： Rajasekhar Reddy Allu , Niraj Nandan , Mihir Narendra Mody , Gang Hua , Brian Okchon Chae , Shashank Dabral , Hetul Sanghvi , Vikram VijayanBabu Appia , Sujith Shivalingappa
Abstract: An apparatus and method for geometrically correcting an arbitrary shaped input frame and generating an undistorted output frame. The method includes capturing arbitrary shaped input images with multiple optical devices and processing the images, identifying redundant blocks and valid blocks in each of the images, allocating an output frame with an output frame size and dividing the output frame into regions shaped as a rectangle, programming the apparatus and disabling processing for invalid blocks in each of the regions, fetching data corresponding to each of the valid blocks and storing in an internal memory, interpolating data for each of the regions with stitching and composing the valid blocks for the output frame and displaying the output frame on a display module.
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公开(公告)号：US20210042891A1
公开(公告)日：2021-02-11
申请号：US17080884
申请日：2020-10-27
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Rajasekhar Reddy Allu , Niraj Nandan , Mihir Narendra Mody , Gang Hua , Brian Okchon Chae , Shashank Dabral , Hetul Sanghvi , Vikram VijayanBabu Appia , Sujith Shivalingappa
Abstract: A method for geometrically correcting a distorted input frame and generating an undistorted output frame includes capturing and storing an input frame in an external memory, allocating an output frame with an output frame size and dividing the output frame into output blocks, computing a size of the input blocks in the input image corresponding to each output blocks, checking if the size of the input blocks is less than the size of the internal memory and if not dividing until the required input block size of divided sub blocks is less than the size of the internal memory, programming an apparatus with input parameters, fetching the input blocks into an internal memory, processing each of the divided sub blocks sequentially and processing the next output block in step until all the output blocks are processed; and composing the output frame for each of the blocks in the output frame.
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