公开(公告)号：US11482499B2

公开(公告)日：2022-10-25

申请号：US16989492

申请日：2020-08-10

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Chia Hu ,  Chun-Chiang Kuo ,  Sen-Bor Jan ,  Ming-Fa Chen ,  Hsien-Wei Chen

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/58 ,  H01L23/522 ,  H01L23/532 ,  H01L29/06 ,  H01L23/00 ,  H01L25/00 ,  H01L25/065

Abstract: A structure includes a first die and a second die. The first die includes a first bonding layer having a first plurality of bond pads disposed therein and a first seal ring disposed in the first bonding layer. The first bonding layer extends over the first seal ring. The second die includes a second bonding layer having a second plurality of bond pads disposed therein. The first plurality of bond pads is bonded to the second plurality of bond pads. The first bonding layer is bonded to the second bonding layer. An area interposed between the first seal ring and the second bonding layer is free of bond pads.

公开(公告)号：US11462458B2

公开(公告)日：2022-10-04

申请号：US17181784

申请日：2021-02-22

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Chia Hu ,  Sen-Bor Jan ,  Hsien-Wei Chen ,  Ming-Fa Chen

IPC: H01L23/48 ,  H01L23/528 ,  H01L21/768 ,  H01L21/66 ,  H01L23/00

Abstract: A semiconductor device including a test pad contact and a method of manufacturing the semiconductor device are disclosed. In an embodiment, a semiconductor device may include a first metal feature and a second metal feature disposed in a single top metal layer over a substrate. A test pad may be formed over and electrically connected to the first metal feature. A first passivation layer may be formed over the second metal feature and the test pad and may cover top and side surfaces of the test pad. A first via may be formed penetrating the first passivation layer and contacting the test pad and a second via may be formed penetrating the first passivation layer and contacting the second metal feature.

公开(公告)号：US11107779B2

公开(公告)日：2021-08-31

申请号：US16655244

申请日：2019-10-17

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hsien-Wei Chen ,  Ming-Fa Chen ,  Sen-Bor Jan ,  Chih-Chia Hu

IPC: H01L23/64 ,  H01L23/00 ,  H01L23/48 ,  H01L21/768

Abstract: A semiconductor package includes a first die and a second die. The first die includes a first spiral section and first bonding metallurgies of an inductor. The first bonding metallurgies are connected to the first spiral section. The second die is bonded to the first die. The second die includes a second spiral section and second bonding metallurgies of the inductor. The second bonding metallurgies are connected to the second spiral section. The inductor extends from the first die to the second die.

公开(公告)号：US20210057309A1

公开(公告)日：2021-02-25

申请号：US16547606

申请日：2019-08-22

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Chia Hu ,  Hsien-Wei Chen ,  Ming-Fa Chen ,  Sen-Bor Jan

IPC: H01L23/48 ,  H01L23/522 ,  H01L23/528 ,  H01L21/768 ,  H01L23/31 ,  H01L23/00

Abstract: A semiconductor structure and the manufacturing method thereof are provided. A semiconductor structure includes a semiconductor substrate, a plurality of interconnecting layers, a first connector, and a second connector. The semiconductor substrate includes a plurality of semiconductor devices therein. The interconnecting layers are disposed over the semiconductor substrate and electrically coupled to the semiconductor devices. The first connector is disposed over the plurality of interconnecting layers and extends to be in contact with a first level of the plurality of interconnecting layers. The second connector is disposed over the plurality of interconnecting layers and substantially leveled with the first connector. The second connector extends further than the first connector to be in contact with a second level of the plurality of interconnecting layers between the first level of the plurality of interconnecting layers and the semiconductor substrate, and the first connector is wider than the second connector.

公开(公告)号：US20200373253A1

公开(公告)日：2020-11-26

申请号：US16989492

申请日：2020-08-10

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Chia Hu ,  Chun-Chiang Kuo ,  Sen-Bor Jan ,  Ming-Fa Chen ,  Hsien-Wei Chen

IPC: H01L23/58 ,  H01L23/522 ,  H01L23/532 ,  H01L23/00 ,  H01L25/065 ,  H01L25/00 ,  H01L29/06

Abstract: A structure includes a first die and a second die. The first die includes a first bonding layer having a first plurality of bond pads disposed therein and a first seal ring disposed in the first bonding layer. The first bonding layer extends over the first seal ring. The second die includes a second bonding layer having a second plurality of bond pads disposed therein. The first plurality of bond pads is bonded to the second plurality of bond pads. The first bonding layer is bonded to the second bonding layer. An area interposed between the first seal ring and the second bonding layer is free of bond pads.