公开(公告)号：US07849382B2

公开(公告)日：2010-12-07

申请号：US11568564

申请日：2005-05-12

申请人： Tetsushi Kasahara ,  Tomoaki Izumi ,  Masahiro Nakanishi ,  Kazuaki Tamura ,  Kiminori Matsuno ,  Yoshihisa Inagaki ,  Manabu Inoue

发明人： Tetsushi Kasahara ,  Tomoaki Izumi ,  Masahiro Nakanishi ,  Kazuaki Tamura ,  Kiminori Matsuno ,  Yoshihisa Inagaki ,  Manabu Inoue

IPC分类号： G11C29/00

CPC分类号： G11C16/10 ,  G06F11/1068

摘要： An address at which a writing error occurs is held, and after a completion of a series of writings, the data of the held address is read. Then, a faulty-block processing is performed only for the addresses, for which it is determined that retry of writing is required, thereby preventing an increase of faulty-blocks. This can suppress the problem that when a writing is performed in a particular flash memory, a writing error frequently occurs and a large number of faulty blocks occur.

摘要翻译： 发生写入错误的地址被保持，并且在一系列写入完成之后，读取保持的地址的数据。 然后，仅对于确定需要重写写入的地址执行错误块处理，从而防止错误块的增加。 这可以抑制在特定闪速存储器中执行写入时经常发生写入错误并发生大量错误块的问题。

公开(公告)号：US07702846B2

公开(公告)日：2010-04-20

申请号：US11908715

申请日：2006-03-09

申请人： Masahiro Nakanishi ,  Tomoaki Izumi ,  Tetsushi Kasahara ,  Kazuaki Tamura ,  Kiminori Matsuno ,  Yutaka Nakamura ,  Masayuki Toyama ,  Yasushi Goho ,  Syunichi Iwanari ,  Yoshihisa Kato ,  Manabu Inoue

发明人： Masahiro Nakanishi ,  Tomoaki Izumi ,  Tetsushi Kasahara ,  Kazuaki Tamura ,  Kiminori Matsuno ,  Yutaka Nakamura ,  Masayuki Toyama ,  Yasushi Goho ,  Syunichi Iwanari ,  Yoshihisa Kato ,  Manabu Inoue

IPC分类号： G06F12/12

CPC分类号： G06F3/0656 ,  G06F3/0613 ,  G06F3/0619 ,  G06F3/0643 ,  G06F3/0679 ,  G06F12/0246 ,  G06F2212/1016 ,  G06F2212/7203

摘要： A nonvolatile storage device is provided with a nonvolatile main storage memory whose erase size is larger than a cluster size, and a buffer, i.e. a nonvolatile auxiliary storage memory. At the time of writing data in the memory, the data is temporarily stored in the buffer, then, a plurality of data in the buffer are collectively taken out to be stored in the main storage memory. Data in an original block is saved in a write block in the main storage memory. Thus, the data can be written in the main storage memory at a high speed.

摘要翻译： 非易失性存储装置具有擦除大小大于簇大小的非易失性主存储存储器和缓冲器，即非易失性辅助存储存储器。 在将数据写入存储器时，将数据临时存储在缓冲器中，然后将缓冲器中的多个数据共同取出以存储在主存储器中。 原始块中的数据保存在主存储器中的写入块中。 因此，可以高速地将数据写入主存储存储器。

公开(公告)号：US07624298B2

公开(公告)日：2009-11-24

申请号：US10597650

申请日：2005-02-02

申请人： Tetsushi Kasahara ,  Tomoaki Izumi ,  Masahiro Nakanishi ,  Kazuaki Tamura ,  Kiminori Matsuno

发明人： Tetsushi Kasahara ,  Tomoaki Izumi ,  Masahiro Nakanishi ,  Kazuaki Tamura ,  Kiminori Matsuno

IPC分类号： G06F11/00

CPC分类号： G06F13/385 ,  G06F11/073 ,  G06F11/0793 ,  G06F11/1052 ,  G11C2029/0409

摘要： A memory card (1) includes a host interface (2) that transmits and receives a command and data to and from the data processor (50), a nonvolatile memory (7) that stores data, a controller (3) that controls the operation of the memory card, and a storage section (32) that stores specified management information. The management information includes retry setting information which specifies whether a retry function is executed or not when an error occurs during an operation of writing data to the nonvolatile memory. The controller (3) refers to the retry setting information in the data writing operation, and controls the data writing operation so as to disable the retry function in the event of an error in the data writing operation, when the retry setting information indicates disabling of the retry function or to enable the retry function in the event of an error in the data writing operation, when the retry setting information indicates enabling of the retry function.

摘要翻译： 存储卡（1）包括向数据处理器（50）发送和接收命令和数据的主机接口（2），存储数据的非易失性存储器（7），控制操作的控制器（3） 以及存储指定的管理信息的存储部（32）。 管理信息包括重试设置信息，其在向非易失性存储器写入数据的操作期间发生错误时指定是否执行重试功能。 控制器（3）参考数据写入操作中的重试设置信息，并且当重试设置信息指示禁用时，控制数据写入操作以便在数据写入操作中发生错误的情况下禁用重试功能 重试功能，或者当重试设置信息指示重试功能的启用时，在数据写入操作中发生错误的情况下启用重试功能。

公开(公告)号：US20080109627A1

公开(公告)日：2008-05-08

申请号：US11718965

申请日：2005-11-08

申请人： Masayuki Toyama ,  Tomoaki Izumi ,  Kazuaki Tamura ,  Kiminori Matsuno ,  Manabu Inoue ,  Masahiro Nakanishi

发明人： Masayuki Toyama ,  Tomoaki Izumi ,  Kazuaki Tamura ,  Kiminori Matsuno ,  Manabu Inoue ,  Masahiro Nakanishi

IPC分类号： G06F12/00

CPC分类号： G06F13/1647 ,  G06F12/0607

摘要： The present invention provides a nonvolatile memory device that can be used in combination with a plurality of types of memory controllers that are different in number of banks to be simultaneously accessed, the nonvolatile memory device being also capable of achieving high-speed access.The nonvolatile memory device of the present invention includes: a memory area divided into a plurality of banks from/to which data can be read/written independently; and data registers for storing data that has been read from the memory area or that is to be written to the memory area, the data registers being at least equal in number to the banks, and connections between the banks and the data registers are changed in accordance with the number of banks that are to be simultaneously accessed.

摘要翻译： 本发明提供一种非易失性存储器件，其可以与要同时存取的存储体数不同的多种存储器控制器组合使用，非易失性存储器件也能够实现高速存取。 本发明的非易失性存储装置包括：分割成可独立读/写数据的多个存储体的存储区域; 以及数据寄存器，用于存储已经从存储器区域读取或要写入存储区域的数据，数据寄存器的数量至少等于存储区，并且存储体和数据寄存器之间的连接被改变为 按照同时访问的银行数量。

公开(公告)号：US20080049504A1

公开(公告)日：2008-02-28

申请号：US11568564

申请日：2005-05-12

申请人： Tetsushi Kasahara ,  Tomoaki Izumi ,  Masahiro Nakanishi ,  Kazuaki Tamura ,  Kiminori Matsuno ,  Yoshihisa Inagaki ,  Manabu Inoue

发明人： Tetsushi Kasahara ,  Tomoaki Izumi ,  Masahiro Nakanishi ,  Kazuaki Tamura ,  Kiminori Matsuno ,  Yoshihisa Inagaki ,  Manabu Inoue

IPC分类号： G11C16/06

CPC分类号： G11C16/10 ,  G06F11/1068

摘要： An address at which a writing error occurs is held, and after a completion of a series of writings, the data of the held address is read. Then, a faulty-block processing is performed only for the addresses, for which it is determined that retry of writing is required, thereby preventing an increase of faulty-blocks. This can suppress the problem that when a writing is performed in a particular flash memory, a writing error frequently occurs and a large number of faulty blocks occur.

摘要翻译： 发生写入错误的地址被保持，并且在一系列写入完成之后，读取保持的地址的数据。 然后，仅对于确定需要重写写入的地址执行错误块处理，从而防止错误块的增加。 这可以抑制在特定闪速存储器中执行写入时经常发生写入错误并发生大量错误块的问题。

公开(公告)号：US20070156948A1

公开(公告)日：2007-07-05

申请号：US11712387

申请日：2007-03-01

申请人： Masahiro Nakanishi ,  Tomoaki Izumi ,  Tetsushi Kasahara ,  Kazuaki Tamura ,  Kiminori Matsuno

发明人： Masahiro Nakanishi ,  Tomoaki Izumi ,  Tetsushi Kasahara ,  Kazuaki Tamura ,  Kiminori Matsuno

IPC分类号： G06F12/06 ,  G06F12/00

CPC分类号： G06F12/06 ,  G06F2212/2022

摘要： A controller 102 and four flash memories F0 to F3 are connected by twos to two memory buses, and each flash memory is divided into two regions of substantially the same size to form a first half and a last half regions. In a four-memory configuration, a consecutive logical address specified by a host apparatus is divided into a predetermined size, and a write operation is performed in a format that repeatedly circulates through F0, F1, F2, F3 in this order. In a two-memory configuration, the write operation is performed in a format that repeatedly circulates through F00, F10, F01, F11. Thus, a controller processing is made common regardless of the number of flash memories connected to the controller.

公开(公告)号：US20070186040A1

公开(公告)日：2007-08-09

申请号：US10597650

申请日：2005-02-02

申请人： Tetsushi Kasahara ,  Tomoaki Izumi ,  Masahiro Nakanishi ,  Kazuaki Tamufa ,  Kiminori Matsuno

发明人： Tetsushi Kasahara ,  Tomoaki Izumi ,  Masahiro Nakanishi ,  Kazuaki Tamufa ,  Kiminori Matsuno

IPC分类号： G06F12/00

CPC分类号： G06F13/385 ,  G06F11/073 ,  G06F11/0793 ,  G06F11/1052 ,  G11C2029/0409

摘要： A memory card (1) includes a host interface (2) that transmits and receives a command and data to and from the data processor (50), a nonvolatile memory (7) that stores data, a controller (3) that controls the operation of the memory card, and a storage section (32) that stores specified management information. The management information includes retry setting information which specifies whether a retry function is executed or not when an error occurs during an operation of writing data to the nonvolatile memory. The controller (3) refers to the retry setting information in the data writing operation, and controls the data writing operation so as to disable the retry function in the event of an error in the data writing operation, when the retry setting information indicates disabling of the retry function or to enable the retry function in the event of an error in the data writing operation, when the retry setting information indicates enabling of the retry function.

摘要翻译： 存储卡（1）包括向数据处理器（50）发送和接收命令和数据的主机接口（2），存储数据的非易失性存储器（7），控制操作的控制器（3） 以及存储指定的管理信息的存储部（32）。 管理信息包括重试设置信息，其在向非易失性存储器写入数据的操作期间发生错误时指定是否执行重试功能。 控制器（3）参考数据写入操作中的重试设置信息，并且当重试设置信息指示禁用时，控制数据写入操作以便在数据写入操作中发生错误的情况下禁用重试功能 重试功能，或者当重试设置信息指示重试功能的启用时，在数据写入操作中发生错误的情况下启用重试功能。