公开(公告)号：US08290458B2

公开(公告)日：2012-10-16

申请号：US12165526

申请日：2008-06-30

申请人： Saeid Safavi

发明人： Saeid Safavi

IPC分类号： H04B1/12

CPC分类号： H04L27/3863 ,  H04L27/364

摘要： Systems and methods for estimating IQ imbalance in a communication system are provided. In various embodiments, a device is configured to perform a self-characterization. The self-characterization is performed over an RF loopback circuit. In some embodiments, a probe is transmitted over the RF loopback circuit. The probe uses a frequency offset such that an image related to one IQ imbalance is separated from an image related to another IQ imbalance. An imbalance estimate is calculated based on processing of the probe.

摘要翻译： 提供了用于估计通信系统中的IQ不平衡的系统和方法。 在各种实施例中，设备被配置为执行自我表征。 通过RF环回电路进行自我表征。 在一些实施例中，探针通过RF回送电路传输。 探头使用频率偏移，使得与一个IQ不平衡相关的图像与与另一个IQ不平衡相关的图像分离。 基于探针的处理计算不平衡估计。

公开(公告)号：US20120218991A1

公开(公告)日：2012-08-30

申请号：US13466582

申请日：2012-05-08

申请人： Arndt MUELLER

发明人： Arndt MUELLER

IPC分类号： H04L12/50

CPC分类号： H04L12/2801 ,  H04L25/0226 ,  H04L27/2613 ,  H04L27/2662

摘要： A method includes appending a preamble to a data packet and transmitting the preamble and data packet over a communication channel in the network. The preamble may be a Beacon, Admission, Broadcast, or High-Throughput Preamble. The Beacon Preamble includes the following symbols SS, SS, SS, SS, SS, SS, SS, SS, SS, SS, SS, SS, LS1, LS1, LS1, LS1, LS1, LS1, LS1, LS1, CP0, CEBeacon, CEBeacon. The Admission Preamble includes the following symbols SS, SS, SS, SS, SS, SS, SS, SS, SS, SS, SS, SS, LS1, LS1, LS1, LS1, LS1, LS1, LS1, LS1, CP0, CE, CE. The Broadcast Preamble includes the following symbols LS1, LS1, LS1, LS1, CP0, CE, CE. The high-throughput preamble includes the following symbols CP0, CE. The SS symbol includes 64 bits, the LS1, LS2, and CP0 symbols include 192 bits, the CE symbol includes 512 bits, and the CEBeacon symbol is a subset of CE.

摘要翻译： 一种方法包括将前导码附加到数据分组，并通过网络中的通信信道发送前同步码和数据分组。 前导码可以是信标，接收，广播或高吞吐量前缀。 信标前导码包括以下符号SS，SS，SS，SS，SS，SS，SS，SS，SS，SS，SS，SS，LS1，LS1，LS1，LS1，LS1，LS1，LS1，LS1，CP0，CEBeacon ，CEBeacon。 入场前导码包括以下符号SS，SS，SS，SS，SS，SS，SS，SS，SS，SS，SS，SS，LS1，LS1，LS1，LS1，LS1，LS1，LS1，LS1，CP0，CE ，CE。 广播前导码包括以下符号LS1，LS1，LS1，LS1，CP0，CE，CE。 高吞吐量前置码包括以下符号CP0，CE。 SS符号包括64位，LS1，LS2和CP0符号包括192位，CE符号包括512位，CEBeacon符号是CE的子集。

公开(公告)号：US08238505B2

公开(公告)日：2012-08-07

申请号：US11715820

申请日：2007-03-08

申请人： Markus Waldner

发明人： Markus Waldner

IPC分类号： H03D3/24

CPC分类号： H04N5/126

摘要： The invention relates to a method or to a correspondingly equipped circuit for line-coupled generation of a clock (t), wherein the clock (t) is controlled in relation to a synchronization signal (hs) and by means of a closed loop (FLL) with respect to the phase and/or the frequency in relation to the synchronization signal (hs); wherein a plurality (n) of at least two count values (cn, c0-c7) is determined, wherein each of the count values (cn, c0-c7) is determined with at least one count duration number (z) of consecutive periods of the synchronization signal (hs), and wherein each of the count values (cn, c0-c7) is determined offset relative to at least one further count value (cn, c0-c7) with a count offset (v) which is different from the count duration number of consecutive periods of the synchronization signal (hs).

摘要翻译： 本发明涉及用于线路耦合产生时钟（t）的方法或相应配备的电路，其中时钟（t）相对于同步信号（hs）和通过闭环（FLL）被控制 ）相对于同步信号（hs）的相位和/或频率; 其中确定多个（n）至少两个计数值（cn，c0-c7），其中每个计数值（cn，c0-c7）由连续周期的至少一个计数持续时间数（z）确定 确定计数值（cn，c0-c7）中的每一个相对于至少一个另外的计数值（cn，c0-c7）偏移，其中计数偏移（v）不同 从同步信号（hs）的连续周期的计数持续时间数。

公开(公告)号：US08223775B2

公开(公告)日：2012-07-17

申请号：US10675566

申请日：2003-09-30

申请人： Gordon Y. Li ,  Yoav Hebron

发明人： Gordon Y. Li ,  Yoav Hebron

IPC分类号： H04L12/46

CPC分类号： H04L12/2803 ,  H04L12/2834

摘要： A cable modem system and architecture. A cable modem engine performs all cable modem functions, and a data networking engine performs all data and home networking functions. The cable modem engine is completely partitioned from the data networking engine. DOCSIS and VoIP functionality is implemented in the cable modem engine. The VoIP functionality may be in accordance with the PacketCable specification. The data networking functionality provided by the data networking engine may be in accordance with the CableHome specification.

摘要翻译： 电缆调制解调器系统和架构。 电缆调制解调器引擎执行所有电缆调制解调器功能，数据网络引擎执行所有数据和家庭网络功能。 电缆调制解调器引擎与数据网络引擎完全分离。 DOCSIS和VoIP功能在电缆调制解调器引擎中实现。 VoIP功能可能符合PacketCable规范。 数据网络引擎提供的数据联网功能可能符合CableHome规范。

公开(公告)号：US08223046B2

公开(公告)日：2012-07-17

申请号：US12822977

申请日：2010-06-24

申请人： Branislav Petrovic

发明人： Branislav Petrovic

IPC分类号： H03M1/10

CPC分类号： H03M1/1245 ,  H03M1/1004 ,  H03M1/1038

摘要： Techniques for accelerated processing associated with analog to digital signal conversion are disclosed. Accelerated processing is provided for sample-and-hold and track-and-hold circuits used with analog to digital converters in various embodiments. An abbreviated sampling state, an abbreviated reset state, or both are employed in various embodiments. By accelerating processing so as to avoid the need for waiting for a signal to settle within a predetermined tolerance, errors of different types may be incurred. Such errors are determined during calibration and stored for future retrieval and error compensation. Techniques for online and offline calibration are disclosed, whereby calibration may or may not impact normal signal conversion processing. Techniques disclosed herein find broad applicability in analog to digital conversion and yield faster processing in a variety of contexts.

摘要翻译： 公开了与模数转换相关的加速处理技术。 在各种实施例中，提供了用于模数转换器的采样保持和跟踪和保持电路的加速处理。 在各种实施例中采用缩写采样状态，缩写复位状态或两者。 通过加速处理，以避免等待信号在预定公差内进行定位，可能会导致不同类型的错误。 这样的误差在校准期间被确定并存储以用于将来检索和误差补偿。 公开了用于在线和离线校准的技术，由此校准可能影响或可能不影响正常的信号转换处理。 在本文中公开的技术在模数转换中具有广泛的适用性，并且在各种上下文中产生更快的处理。

公开(公告)号：US08212546B2

公开(公告)日：2012-07-03

申请号：US12407506

申请日：2009-03-19

申请人： Sameer Vora

发明人： Sameer Vora

IPC分类号： G01R19/00

CPC分类号： G01R21/10 ,  H03G3/3036

摘要： A system includes a first circuit and a second circuit. The first circuit includes a first MOS transistor having a gate and a drain. The first circuit is configured to receive a radio frequency (RF) signal at the gate of the first MOS transistor. The drain of the first MOS transistor is configured to output a first current that is proportional to the square of the input voltage of the RF signal while receiving the RF signal. The second circuit includes a second MOS transistor having a source configured to receive a first current from the first circuit. The second MOS transistor is biased in a triode region and has a channel resistance between the source and a drain. The second circuit is configured to output a voltage proportional to the value of the power of the RF signal received by the first circuit.

摘要翻译： 系统包括第一电路和第二电路。 第一电路包括具有栅极和漏极的第一MOS晶体管。 第一电路被配置为在第一MOS晶体管的栅极处接收射频（RF）信号。 第一MOS晶体管的漏极被配置为输出与RF信号的输入电压的平方成正比的第一电流，同时接收RF信号。 第二电路包括具有被配置为从第一电路接收第一电流的源极的第二MOS晶体管。 第二MOS晶体管被偏置在三极管区域中并且在源极和漏极之间具有沟道电阻。 第二电路被配置为输出与由第一电路接收的RF信号的功率的值成比例的电压。

公开(公告)号：US08198935B2

公开(公告)日：2012-06-12

申请号：US13098739

申请日：2011-05-02

申请人： Wai Lim Ngai

发明人： Wai Lim Ngai

IPC分类号： H03K17/687

CPC分类号： H02M3/07 ,  G01R15/06 ,  H02M2003/072

摘要： Methods and apparatus for capacitive voltage division are provided, an example apparatus having an input and an output and including a first switched capacitor circuit. In some embodiments, the capacitive voltage divider includes first and second MOSFETs. A first capacitor is coupled between the drain of the first MOSFET and the input to the capacitive voltage divider. A first circuit coupled to the drain of the first MOSFET is configured to pull down the drain of the first MOSFET and thus apply a reverse bias to a first junction diode internal to the first MOSFET between the drain and the bulk of the first MOSFET. A second capacitor is coupled between the source of the first MOSFET and the drain of the second MOSFET. A second circuit is configured to reverse bias a second junction diode between the drain and bulk of the second MOSFET.

摘要翻译： 提供了用于电容分压的方法和装置，具有输入和输出并且包括第一开关电容器电路的示例装置。 在一些实施例中，电容分压器包括第一和第二MOSFET。 第一电容器耦合在第一MOSFET的漏极和电容分压器的输入端之间。 耦合到第一MOSFET的漏极的第一电路被配置为下拉第一MOSFET的漏极，并且因此将第一MOSFET的内部的第一结二极管施加到漏极和第一MOSFET的主体之间的反向偏置。 第二电容器耦合在第一MOSFET的源极和第二MOSFET的漏极之间。 第二电路被配置为在第二MOSFET的漏极和体积之间反向偏置第二结二极管。

公开(公告)号：US08181208B1

公开(公告)日：2012-05-15

申请号：US10637173

申请日：2003-08-07

申请人： Ladd Elwardani

发明人： Ladd Elwardani

IPC分类号： H04N7/16

CPC分类号： H04N7/104 ,  H04N7/106

摘要： A media server located in the home has video processing and storage capability. The media server receives video programming and control data from the cable plant head-end and receives status and control data from set top boxes (STBs). The media server can also receive locally generated video programming. The media server transmits signals that implement head-end functions to set top boxes within the home, including video programming and control data. The media server receives status data from the STBs. A point of entry distribution device provides signal coupling and blocking to allow signals to propagate within the home and to the head-end but block certain signals from leaving the home to maintain isolation. The server communicates to legacy STBs and to new STBs and devices that do not use the legacy waveform. Legacy STBs can communicate with the server or with the cable head-end. New devices can communicate with the server and with each other over the in-home coaxial cable wiring. A network is formed using the in-home coaxial cable wiring.

摘要翻译： 位于家中的媒体服务器具有视频处理和存储功能。 媒体服务器从电缆厂头端接收视频编程和控制数据，并从机顶盒（STB）接收状态和控制数据。 媒体服务器还可以接收本地生成的视频节目。 媒体服务器发送实现头端功能的信号，在家庭内设置机顶盒，包括视频编程和控制数据。 媒体服务器从STB接收状态数据。 入口分配设备提供信号耦合和阻塞，以允许信号在家庭内和头端传播，但阻止某些信号离开家庭以保持隔离。 服务器与传统机顶盒以及不使用传统波形的新机顶盒和设备进行通信。 传统STB可以与服务器或电缆头端进行通信。 新设备可以通过家庭内同轴电缆布线与服务器和彼此进行通信。 使用家用同轴电缆布线形成网络。

公开(公告)号：US20120013404A1

公开(公告)日：2012-01-19

申请号：US13171257

申请日：2011-06-28

申请人： Wai Lim NGAI

发明人： Wai Lim NGAI

IPC分类号： H03F3/45

CPC分类号： H03F3/45183 ,  H03F1/26 ,  H03F1/3205 ,  H03F1/3211 ,  H03F1/3247 ,  H03F1/56 ,  H03F3/195 ,  H03F3/245 ,  H03F2200/222 ,  H03F2200/36 ,  H03F2203/45366 ,  H03F2203/45481 ,  H03F2203/45638 ,  H03F2203/45644 ,  H03F2203/45701 ,  H03F2203/45702

摘要： A CMOS differential power amplifier having broadband input matching with Noise and Non-linearity Cancellation. The broadband input match is realized by using two “Diode-Connected” NFETs (i.e., N-type Field Effect Transistors). Resulting noise degradation is reduced by using a noise cancellation structure. By using the same structure the disclosed method and apparatus also achieves non-linearity cancellation.

摘要翻译： 具有与噪声和非线性消除匹配的宽带输入的CMOS差分功率放大器。 宽带输入匹配通过使用两个“二极管连接”NFET（即N型场效应晶体管）来实现。 通过使用噪声消除结构，降低了噪声降低。 通过使用相同的结构，所公开的方法和装置也实现非线性消除。

公开(公告)号：US08085802B1

公开(公告)日：2011-12-27

申请号：US11292939

申请日：2005-12-02

申请人： Anton Monk ,  Brett Bernath ,  Itzhak Gurantz ,  Ladd El Wardanj ,  Ron Porat ,  Yusuf Ozturk ,  Ron Lee ,  Wee-Peng Goh ,  Magnus Berggren

发明人： Anton Monk ,  Brett Bernath ,  Itzhak Gurantz ,  Ladd El Wardanj ,  Ron Porat ,  Yusuf Ozturk ,  Ron Lee ,  Wee-Peng Goh ,  Magnus Berggren

IPC分类号： H04L12/28

CPC分类号： H04L49/30 ,  H04L1/0003 ,  H04L1/0061 ,  H04L5/0046 ,  H04L12/2838 ,  H04L12/2872 ,  H04L27/2601 ,  H04Q11/0471

摘要： A BCN network with BCN modems that communicate using predefined messages to establish, optimize and facilitate data communication.

摘要翻译： 具有BCN调制解调器的BCN网络，其使用预定义消息进行通信，以建立，优化和促进数据通信。