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    Estimation of imperfections of a time-interleaved analog-to-digital converter
    4.
    发明授权
    Estimation of imperfections of a time-interleaved analog-to-digital converter 有权
    时间交织模数转换器的缺陷估计

    公开(公告)号：US09331708B2

    公开(公告)日：2016-05-03

    申请号：US14769914

    申请日：2014-03-07

    Applicant: Anacatum Design AB

    Inventor： Rolf Sundblad

    IPC: H03M1/36 ,  H03M1/10 ,  H03M1/12

    CPC classification number: H03M1/1004 ,  H03M1/1057 ,  H03M1/121 ,  H03M1/1215 ,  H03M1/1245

    Abstract: A method of operating a time-interleaved analog-to-digital converter for conversion of an analog input signal to a digital output signal having a sample rate R comprises, for each of at least some activations of an array of constituent analog-to-digital converters, defining first and second sets of the constituent analog-to-digital converters, feeding the analog input of each analog-to-digital converter of the first set with a reference value for imperfection measurements and clocking each analog-to-digital converter of the first set with one of the timing signals, feeding the analog input of each of analog-to-digital converter of the second set with the analog input signal for generation of an intermediate constituent digital output signal at the digital output and clocking each analog-to-digital converter of the second set with one of the timing signals, wherein no timing signal is used to clock two or more of analog-to-digital converters of the second set.

    Abstract translation: 操作用于将模拟输入信号转换为具有采样率R的数字输出信号的时间交织的模拟 - 数字转换器的方法包括针对组成模数转换器阵列的至少一些激活的每一个 转换器，定义第一组和第二组组成模数转换器，将第一组的每个模数转换器的模拟输入馈送到不完整测量的参考值，并使每个模数转换器 第一组具有一个定时信号，将第二组的模拟 - 数字转换器的模拟输入馈送到模拟输入信号，以在数字输出端产生中间组成数字输出信号，并为每个模拟 - 具有定时信号之一的第二组的数模转换器，其中没有定时信号用于对第二组的模数转换器中的两个或更多个进行定时。

    Self-calibrating VCO-based analog-to-digital converter and method thereof
    5.
    发明授权
    Self-calibrating VCO-based analog-to-digital converter and method thereof 有权
    自校准基于VCO的模数转换器及其方法

    公开(公告)号：US09214951B1

    公开(公告)日：2015-12-15

    申请号：US14291441

    申请日：2014-05-30

    Applicant: Realtek Semiconductor Corp.

    Inventor： Chia-Liang (Leon) Lin

    IPC: H03M1/10 ,  H03M1/12

    CPC classification number: H03M1/1019 ,  H03M1/10 ,  H03M1/1004 ,  H03M1/1009 ,  H03M1/1235 ,  H03M1/60

    Abstract: A circuit includes an input dispatch unit for receiving an input signal and a calibration signal and outputting N dispatched signals in accordance with a selection signal. The circuit also includes N analog-to-digital converter (ADC) units for receiving the N dispatched signals, N control signals, and N mapping tables and outputting N raw data, and N refined data, respectively. An output dispatch unit receives the N refined data and outputting an output data in accordance with the selection signal, and a calibration controller receives the N raw data and outputting the selection signal, the N control signals, the N mapping tables, and a digital code. A DAC (digital-to-analog converter) receives the digital code and outputting the calibration signal, wherein one of the dispatched signals, as specified by the selection signal is from the calibration signal while the other dispatched signals are from the input signal.

    Abstract translation: 电路包括输入调度单元，用于接收输入信号和校准信号，并根据选择信号输出N个调度信号。 该电路还包括N个模拟 - 数字转换器（ADC）单元，用于分别接收N个调度信号，N个控制信号和N个映射表，并分别输出N个原始数据和N个精细数据。 输出调度单元接收N个精细数据并根据选择信号输出输出数据，校准控制器接收N个原始数据并输出选择信号，N个控制信号，N个映射表和数字代码 。 DAC（数模转换器）接收数字代码并输出校准信号，其中由选择信号指定的调度信号之一来自校准信号，而另一个调度信号来自输入信号。

    SELF-CALIBRATING VCO-BASED ANALOG-TO-DIGITAL CONVERTER AND METHOD THEREOF
    6.
    发明申请
    SELF-CALIBRATING VCO-BASED ANALOG-TO-DIGITAL CONVERTER AND METHOD THEREOF 有权
    自校准基于VCO的模数转换器及其方法

    公开(公告)号：US20150349794A1

    公开(公告)日：2015-12-03

    申请号：US14291441

    申请日：2014-05-30

    Applicant: Realtek Semiconductor Corp.

    Inventor： Chia-Liang (Leon) Lin

    IPC: H03M1/10 ,  H03M1/12

    CPC classification number: H03M1/1019 ,  H03M1/10 ,  H03M1/1004 ,  H03M1/1009 ,  H03M1/1235 ,  H03M1/60

    Abstract: A circuit includes an input dispatch unit for receiving an input signal and a calibration signal and outputting N dispatched signals in accordance with a selection signal. The circuit also includes N analog-to-digital converter (ADC) units for receiving the N dispatched signals, N control signals, and N mapping tables and outputting N raw data, and N refined data, respectively. An output dispatch unit receives the N refined data and outputting an output data in accordance with the selection signal, and a calibration controller receives the N raw data and outputting the selection signal, the N control signals, the N mapping tables, and a digital code. A DAC (digital-to-analog converter) receives the digital code and outputting the calibration signal, wherein one of the dispatched signals, as specified by the selection signal is from the calibration signal while the other dispatched signals are from the input signal.

    Abstract translation: 电路包括输入调度单元，用于接收输入信号和校准信号，并根据选择信号输出N个调度信号。 该电路还包括N个模拟 - 数字转换器（ADC）单元，用于分别接收N个调度信号，N个控制信号和N个映射表，并分别输出N个原始数据和N个精细数据。 输出调度单元接收N个精细数据并根据选择信号输出输出数据，校准控制器接收N个原始数据并输出选择信号，N个控制信号，N个映射表和数字代码 。 DAC（数模转换器）接收数字代码并输出校准信号，其中由选择信号指定的调度信号之一来自校准信号，而另一个调度信号来自输入信号。

    ON-CHIP ANALOG-TO-DIGITAL CONVERTER (ADC) LINEARITY TEXT FOR EMBEDDED DEVICES
    7.
    发明申请
    ON-CHIP ANALOG-TO-DIGITAL CONVERTER (ADC) LINEARITY TEXT FOR EMBEDDED DEVICES 有权
    片上模拟数字转换器（ADC）嵌入式设备的线性文本

    公开(公告)号：US20150249458A1

    公开(公告)日：2015-09-03

    申请号：US14193669

    申请日：2014-02-28

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Cormac HARRINGTON ,  Ken MOUSHEGIAN ,  Andrew ALLEMAN

    IPC: H03M1/10 ,  H03M1/12

    CPC classification number: H03M1/1004 ,  H03M1/1033 ,  H03M1/109 ,  H03M1/1095 ,  H03M1/12 ,  H03M1/1245

    Abstract: A method for testing linearity of an ADC, comprising receiving a trigger signal indicating an ADC input voltage step adjustment, reading an ADC output sample upon receiving the trigger signal, wherein the ADC output sample has a value range of N integer values that correspond to N discrete ADC output codes, computing a histogram of code occurrences for M consecutive ADC output codes, wherein the histogram comprises M number of bins corresponding to the M consecutive ADC output codes, and wherein M is less than N, updating a DNL value and an INL value according to the histogram at an interval of K number of ADC output sample readings, and shifting the histogram by one ADC output code after updating the DNL and the INL values.

    Abstract translation: 一种用于测试ADC的线性度的方法，包括接收指示ADC输入电压阶跃调整的触发信号，在接收到所述触发信号时读取ADC输出采样，其中所述ADC输出采样具有对应于N的N个整数值的值范围 离散ADC输出代码，计算M个连续ADC输出代码的代码发生的直方图，其中所述直方图包括M个对应于M个连续ADC输出代码的仓，并且其中M小于N，更新DNL值和INL 根据直方图的值，以K个ADC输出采样读数的间隔，并在更新DNL和INL值之后将直方图移位一个ADC输出代码。

    Semiconductor device and adjustment method therefor
    8.
    发明授权
    Semiconductor device and adjustment method therefor 有权
    半导体器件及其调整方法

    公开(公告)号：US08886141B2

    公开(公告)日：2014-11-11

    申请号：US13657765

    申请日：2012-10-22

    Applicant: RENESAS Electronics Corporation

    Inventor： Hideo Nakane ,  Keisuke Kimura ,  Takaya Yamamoto ,  Tatsuji Matsuura ,  Ryuichi Ujiie

    IPC: H04B17/02 ,  H03M1/10 ,  H04B1/10

    CPC classification number: H03M1/1004 ,  H03M1/1009 ,  H04B1/1027

    Abstract: Provided is a semiconductor device that is capable of performing background calibration during a reception operation without adversely affecting reception characteristics. During a reception operation, the semiconductor device detects a timing at which an invalid received signal occurs upon a gain change or a reception channel change and performs background calibration at the detected timing. In this instance, as the received signal is invalid, performing the calibration does not further decrease the substantial accuracy of reception. Moreover, an unnecessary signal component, which would arise when the background calibration is performed at fixed intervals, will not be generated as far as the background calibration is performed at random timing.

    Abstract translation: 提供了能够在接收操作期间执行背景校准而不会不利地影响接收特性的半导体器件。 在接收操作期间，半导体器件检测在增益改变或接收信道改变时发生无效接收信号的定时，并在检测到的定时执行背景校准。 在这种情况下，由于接收信号无效，进行校准不会进一步降低接收的实质准确性。 此外，只要在随机定时执行背景校准，就不会产生当以固定间隔执行背景校准时将产生的不必要的信号分量。

    Background calibration scheme for analog-to-digital converters
    9.
    发明授权
    Background calibration scheme for analog-to-digital converters 有权
    模数转换器的背景校准方案

    公开(公告)号：US08766832B1

    公开(公告)日：2014-07-01

    申请号：US13669033

    申请日：2012-11-05

    Applicant: Xilinx, Inc.

    Inventor： Ivan Bogue

    IPC: H03M1/10 ,  H03M1/12

    CPC classification number: H03M1/10 ,  H03M1/1004 ,  H03M1/1014 ,  H03M1/12 ,  H03M1/162 ,  H03M1/164 ,  H03M1/40 ,  H03M1/44

    Abstract: An analog-to-digital converter (ADC) includes an analog input stage including an output configured to generate an analog output signal and a digital stage coupled the output of the analog input stage. The digital stage is configured to classify the analog output signal into one of a plurality of consecutive voltage ranges. Responsive to the analog output signal being classified in a first enumerated voltage range of the plurality of voltage ranges during a rotation of a sample, a voltage for a subsequent rotation is determined as if the analog output signal is classified into a non-enumerated voltage range selected according to a state of a random number signal.

    Abstract translation: 模数转换器（ADC）包括模拟输入级，其包括被配置为产生模拟输出信号的输出和耦合模拟输入级的输出的数字级。 数字级被配置为将模拟输出信号分类为多个连续电压范围之一。 响应于模拟输出信号被分类为在样品旋转期间的多个电压范围的第一枚举电压范围中，用于随后旋转的电压被确定为仿照模拟输出信号被分类为非枚举电压范围 根据随机数信号的状态选择。

    ARRANGEMENT FOR READING OUT AN ANALOGUE VOLTAGE SIGNAL WITH SELF-CALIBRATION
    10.
    发明申请
    ARRANGEMENT FOR READING OUT AN ANALOGUE VOLTAGE SIGNAL WITH SELF-CALIBRATION 有权
    用于读取具有自校准的模拟电压信号的布置

    公开(公告)号：US20140077980A1

    公开(公告)日：2014-03-20

    申请号：US14085276

    申请日：2013-11-20

    Applicant: ABB TECHNOLOGY AG

    Inventor： Joris PASCAL ,  Stéphane Isler

    IPC: H03M1/06

    CPC classification number: H03M1/0609 ,  H03M1/1004 ,  H03M3/382 ,  H03M3/43

    Abstract: An arrangement for reading out an analog voltage input signal includes an input applying the input signal thereto, and a reference unit generating an analog reference voltage. To perform online self-calibration, the arrangement includes a superposition unit generating a combined analog signal by superimposing the analog reference voltage onto the input signal, a converting unit converting the combined analog signal into a one-bit serial data stream at a conversion sampling rate, and a decomposition unit, which includes at least two digital filters configured to generate from the serial data stream two corresponding digital signals at different data rates, which can be less than the conversion sampling rate. Two data processing units calculate from the corresponding digital signal a digital input voltage representing the input signal and a digital reference voltage representing the analog reference voltage or a disturbance voltage signal representing parasitic voltage components introduced by the superposition unit, respectively.

    Abstract translation: 用于读出模拟电压输入信号的装置包括施加输入信号的输入端和产生模拟参考电压的参考单元。 为了执行在线自校准，该装置包括叠加单元，通过将模拟参考电压叠加到输入信号上产生组合的模拟信号，转换单元以转换采样率将组合的模拟信号转换为1位串行数据流 以及分解单元，其包括至少两个数字滤波器，所述至少两个数字滤波器被配置为从串行数据流生成两个不同数据速率的对应的数字信号，其可以小于转换采样率。 两个数据处理单元从对应的数字信号计算表示输入信号的数字输入电压和表示模拟参考电压的数字参考电压或表示由叠加单元引入的寄生电压分量的干扰电压信号。

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