公开(公告)号：US11768086B2

公开(公告)日：2023-09-26

申请号：US16456905

申请日：2019-06-28

申请人： Infineon Technologies AG

发明人： Franz Jost ,  Harald Witschnig ,  Juergen Zimmer

IPC分类号： G01D5/16 ,  G01R33/09 ,  G01R33/00 ,  G01D3/08 ,  H10B61/00 ,  H10N59/00 ,  H10N50/00

CPC分类号： G01D5/16 ,  G01D3/08 ,  G01R33/0052 ,  G01R33/09 ,  H10B61/00 ,  H10N50/00 ,  H10N59/00

摘要： A method for forming a sensor circuit. The method includes forming a plurality of magnetoresistive structures having a first predefined reference magnetization direction in a first common area of a common semiconductor substrate; forming a plurality of magnetoresistive structures having a second predefined reference magnetization direction in a second common area of the common semiconductor substrate; and forming electrically conductive structures electrically coupling the magnetoresistive structures having the first predefined reference magnetization direction to the magnetoresistive structures having the second predefined reference magnetization direction to form a plurality of half-bridge sensor circuits, wherein each half-bridge sensor circuit comprises a magnetoresistive structure having the first predefined reference magnetization direction electrically coupled to a second magnetoresistive structure having the second predefined reference magnetization direction.

公开(公告)号：US11737372B2

公开(公告)日：2023-08-22

申请号：US17560922

申请日：2021-12-23

申请人： Godo Kaisha IP Bridge 1

发明人： Shinji Yuasa

IPC分类号： H01L27/105 ,  H10N50/85 ,  H01F10/13 ,  G11C11/15 ,  H01L49/02 ,  B82Y25/00 ,  G11C11/16 ,  H10B53/30 ,  H10B61/00 ,  H10N50/01 ,  H10N50/10 ,  H10N50/80 ,  H01F10/32 ,  B82Y10/00 ,  H10N59/00

CPC分类号： H10N50/85 ,  B82Y25/00 ,  G11C11/15 ,  G11C11/16 ,  G11C11/161 ,  H01F10/132 ,  H01F10/3254 ,  H01L28/55 ,  H10B53/30 ,  H10B61/00 ,  H10B61/22 ,  H10N50/01 ,  H10N50/10 ,  H10N50/80 ,  B82Y10/00 ,  H10N59/00

摘要： The output voltage of an MRAM is increased by means of an Fe(001)/MgO(001)/Fe(001) MTJ device, which is formed by microfabrication of a sample prepared as follows: A single-crystalline MgO (001) substrate is prepared. An epitaxial Fe(001) lower electrode (a first electrode) is grown on a MgO(001) seed layer at room temperature, followed by annealing under ultrahigh vacuum. A MgO(001) barrier layer is epitaxially formed on the Fe(001) lower electrode (the first electrode) at room temperature, using a MgO electron-beam evaporation. A Fe(001) upper electrode (a second electrode) is then formed on the MgO(001) barrier layer at room temperature. This is successively followed by the deposition of a Co layer on the Fe(001) upper electrode (the second electrode). The Co layer is provided so as to increase the coercive force of the upper electrode in order to realize an antiparallel magnetization alignment.