公开(公告)号：US06760209B1

公开(公告)日：2004-07-06

申请号：US10147011

申请日：2002-05-16

申请人： Bradley A. Sharpe-Geisler

发明人： Bradley A. Sharpe-Geisler

IPC分类号： H02H322

CPC分类号： H01L27/0259 ,  H01L27/0255

摘要： An electrostatic discharge ESD protection circuit is provided which can selectively be set to operate with a buffer which is programmably controlled to be compatible with different types of circuitry, such as PCI, GTL, or PECL circuits. The ESD circuit includes a lateral NPN BJT transistor which provides a path to ground during ESD without experiencing the gate oxide damage of a typical MOS type device. Additional BJTs are included in Darlington-pair configuration to connect the pad to the lateral BJT during an ESD event and not experience oxide damage. An additional BJT is included along with a series of diode connected transistors to selectively clamp the pad voltage. The pad voltage is clamped to a desired value by controlling fuses connecting the series of diode connected transistors.

摘要翻译： 提供一种静电放电ESD保护电路，其可以选择性地设置为与可编程地控制以与诸如PCI，GTL或PECL电路的不同类型的电路兼容的缓冲器操作。 ESD电路包括横向NPN BJT晶体管，其在ESD期间提供到地的路径，而不会经历典型的MOS型器件的栅极氧化物损坏。 附加BJT包含在达林顿对配置中，以在ESD事件期间将焊盘连接到横向BJT，并且不会经历氧化物损坏。 随附一个BJT以及一系列二极管连接的晶体管，以选择性地钳位焊盘电压。 通过控制连接二极管连接的晶体管的熔丝将焊盘电压钳位到所需的值。

公开(公告)号：US06744613B2

公开(公告)日：2004-06-01

申请号：US10086251

申请日：2002-03-01

申请人： Michael McCook ,  Andrew Benton

发明人： Michael McCook ,  Andrew Benton

IPC分类号： H02H322

CPC分类号： H02H9/005 ,  H02H9/001

摘要： A system and method for conditioning a power transmission, thereby eliminating adverse characteristics from the power transmission. The system selectively includes a voltage surge protector, an EMI/RFI filter and at least one inrush current suppressor integrally formed into a single system. To condition an incoming power transmission, the power transmission is passed through the voltage surge protector to eliminate any abnormal voltage spikes. The power transmission is then passed through an improved EMI/RFI filter having a dual output. The outputs of the EMI/RFI filter lead into a first inrush current suppressor. The inrush current suppressor limits the amperage of the power transmission for a predetermined period of time and then permits unrestricted current flow.

摘要翻译： 一种用于调节电力传输的系统和方法，从而消除了电力传输的不利特征。 该系统选择性地包括电压浪涌保护器，EMI / RFI滤波器和一体地形成为单个系统的至少一个浪涌电流抑制器。 为了调节输入功率传输，电力传输通过电压电涌保护器，以消除任何异常的电压尖峰。 然后，电力传输通过具有双输出的改进的EMI / RFI滤波器。 EMI / RFI滤波器的输出引入第一个浪涌电流抑制器。 浪涌电流抑制器将电力传输的电流强度限制在预定的时间段，然后允许不受限制的电流流动。

公开(公告)号：US06731488B2

公开(公告)日：2004-05-04

申请号：US10063225

申请日：2002-04-01

申请人： Steven H. Voldman

发明人： Steven H. Voldman

IPC分类号： H02H322

CPC分类号： H01L27/0259 ,  H03K17/04113 ,  H03K17/08146

摘要： The invention provides a method and circuit design for providing ESD protection. Specifically, a dual emitter transistor is used to provide bipolar operation and ESD protection. The first emitter provides bipolar operation under normal operating conditions. The second emitter provides an alternative current path for ESD protection.

摘要翻译： 本发明提供了一种用于提供ESD保护的方法和电路设计。 具体来说，双发射极晶体管用于提供双极性操作和ESD保护。 第一个发射器在正常工作条件下提供双极性操作。 第二个发射器为ESD保护提供了一个替代电流路径。

公开(公告)号：US06707658B2

公开(公告)日：2004-03-16

申请号：US09855168

申请日：2001-05-14

申请人： Yung-Hsiang Chao ,  Sung-Wen Chang ,  Ming-Yu Chang

发明人： Yung-Hsiang Chao ,  Sung-Wen Chang ,  Ming-Yu Chang

IPC分类号： H02H322

CPC分类号： H05B41/2921 ,  H05B41/2926 ,  Y02B20/208

摘要： A surge protection and reset circuit is provided for resetting a microprocessor to maintain a discharge lamp under a normal operating condition when the microprocessor is crashed owing to the cross talk or radiation effect in igniting a discharge lamp. The surge protection and reset circuit includes a ballast electrically connected to the discharge lamp for igniting the discharge lamp, a starting control circuit electrically connected to the ballast for triggering the ballast to ignite the discharge lamp and powering the ballast, a microprocessor electrically connected to the starting control circuit for initializing the starting control circuit when the microprocessor receives a lamp-state signal and a reset signal, and a reset circuit having an output terminal electrically connected to the microprocessor for providing the reset signal to reset the microprocessor when the reset circuit receives the lamp-state signal from a lamp-state terminal of the ballast.

摘要翻译： 提供浪涌保护和复位电路，用于在微处理器由于在点燃放电灯时的串扰或辐射效应而崩溃时复位微处理器以将放电灯维持在正常工作状态。 浪涌保护和复位电路包括电连接到用于点燃放电灯的放电灯的镇流器，电连接到镇流器的起动控制电路，用于触发镇流器点燃放电灯并为镇流器供电，微处理器电连接到 启动控制电路，用于当微处理器接收到灯状态信号和复位信号时初始化启动控制电路;以及复位电路，其具有电连接到微处理器的输出端，用于在复位电路接收时提供复位信号以复位微处理器 来自镇流器的灯状态端子的灯状态信号。

公开(公告)号：US06693784B1

公开(公告)日：2004-02-17

申请号：US10252190

申请日：2002-09-23

申请人： Zoltan Zansky ,  Bill Jacobsen

发明人： Zoltan Zansky ,  Bill Jacobsen

IPC分类号： H02H322

CPC分类号： G05F1/571

摘要： The present invention is a method and system for actively limiting transient voltages across a voltage bus. Circuitry coupled to a bus may adjust the voltage level of a bus to a voltage within a desired range when transient voltages cause the voltage level on the bus to fall outside of a desired range. Circuitry of the present invention may include active elements that may adjust a voltage level of a bus in a rapid fashion. Additionally, use of the circuitry of the present invention reduces the cost and design limitations associated with stabilizing buses by solely using multiple low ESR/ESL capacitors.

摘要翻译： 本发明是用于主动限制跨越电压总线的瞬态电压的方法和系统。 耦合到总线的电路可以在瞬态电压导致总线上的电压水平落在期望范围之外时将总线的电压电平调整到期望范围内的电压。 本发明的电路可以包括可以以快速方式调整总线的电压电平的有源元件。 另外，使用本发明的电路通过单独使用多个低ESR / ESL电容器来降低与稳定总线相关联的成本和设计限制。

公开(公告)号：US06608744B1

公开(公告)日：2003-08-19

申请号：US09432102

申请日：1999-11-02

申请人： Katsuhiro Kato

发明人： Katsuhiro Kato

IPC分类号： H02H322

CPC分类号： H01L27/0266

摘要： An integrated circuit fabricated by silicon-on-insulator technology has an input terminal coupled to the gate electrodes of a CMOS inverter. Within the integrated circuit, the input terminal is coupled through a first protective element either to the power supply or to ground, but not to both. A second protective element is coupled in parallel with the inverter between the power supply and ground. This configuration protects both transistors in the inverter from input surges, without restricting the normal input voltage to the range between the power-supply voltage and ground.

摘要翻译： 由绝缘体上硅技术制造的集成电路具有耦合到CMOS反相器的栅电极的输入端。 在集成电路内，输入端子通过第一保护元件耦合到电源或接地，但不耦合到两者。 第二保护元件与电源和地之间的逆变器并联耦合。 该配置保护逆变器中的两个晶体管免受输入浪涌，而不会将正常输入电压限制在电源电压和地之间的范围内。

公开(公告)号：US06549388B2

公开(公告)日：2003-04-15

申请号：US09738148

申请日：2000-12-15

申请人： Darrell Robinson

发明人： Darrell Robinson

IPC分类号： H02H322

CPC分类号： H01R13/6666 ,  H01R33/945 ,  H02B1/03

摘要： An electrical service apparatus housing carries a plurality of line and load blade terminals and jaw contacts. Surge suppression elements are carried on a circuit board mountable within the housing and are connected to certain blade terminals and jaw contacts for conducting electrical surges to ground. Insulating barriers surround the jaw contacts and, also, fixedly position the circuit board in the housing. A switch element is energized when one of the surge suppression elements changes state and provides an externally transmittable signal indicative of the change in state of one of the surge suppression elements. An insulating safety shield surrounds the jaw contacts. A light transmissive guide carried on the shield has a first end disposed adjacent to a light source on the circuit board and an opposed second end visible exteriorly through the housing to provide an exteriorly visible indication of the state of the light source.

公开(公告)号：US06501632B1

公开(公告)日：2002-12-31

申请号：US09632414

申请日：2000-08-04

申请人： Leslie Ronald Avery ,  Christian Cornelius Russ

发明人： Leslie Ronald Avery ,  Christian Cornelius Russ

IPC分类号： H02H322

CPC分类号： H01L27/0277

摘要： Apparatus for providing electrostatic discharge protection having an nMOS transistor with bias simultaneously applied to the gate and the p-well of the nMOS transistor. A bias circuit is fabricated using a plurality of the Zener diodes. The double bias allows for a relatively high gate voltage to be applied to the nMOS transistor enabling the nMOS transistor to be biased to optimum conditions for bipolar snapback.

摘要翻译： 用于提供具有同时施加到nMOS晶体管的栅极和p阱的偏置的nMOS晶体管的静电放电保护的装置。 使用多个齐纳二极管制造偏置电路。 双偏压允许将相对较高的栅极电压施加到nMOS晶体管，使得nMOS晶体管能够被偏置到用于双极性快速恢复的最佳条件。

公开(公告)号：US06433984B1

公开(公告)日：2002-08-13

申请号：US09540070

申请日：2000-03-31

申请人： Andrew M. Cherniski

发明人： Andrew M. Cherniski

IPC分类号： H02H322

CPC分类号： H03H7/427 ,  H03H1/0007

摘要： A line filter assembly for diverting unwanted emissions generated on a power cord between a power sub-system source and a power grid to ground is disclosed. The line filter assembly includes a PC board having first and second sides. A first pad covered with an electrically conducting material is positioned adjacent to the first side of the PC board. A first electrically conducting brace is an electrical connection with the electrically conducting material covering the first pad. The first electrically conducting brace is also in connection with an enclosure of the line filter assembly. First and second electrically conducting plates are fabricated on the second side of the PC board. The first and second electrically conducting plates are connected to first and second power lines of the power cord, respectively. A dielectric film is positioned adjacent to the first and second electrically conducting plates. A second pad covered with an electrically conducting material is positioned adjacent to the dielectric film. A second electrically conducting brace is in electrically connection with the electrically conducting material covering the second pad and in electrically connection with the enclosure of the line filter assembly.

摘要翻译： 公开了一种线路滤波器组件，用于将功率子系统源和电网之间的电力线上产生的无用发射转移到地。 线路滤波器组件包括具有第一和第二侧的PC板。 覆盖有导电材料的第一焊盘位于PC板的第一侧附近。 第一导电支架是与导电材料覆盖第一垫的电连接。 第一导电支架也与线路滤波器组件的外壳连接。 第一和第二导电板制造在PC板的第二面上。 第一和第二导电板分别连接到电源线的第一和第二电源线。 绝缘膜位于第一和第二导电板附近。 覆盖有导电材料的第二焊盘邻近电介质膜定位。 第二导电支架与覆盖第二垫的导电材料电连接并且与线路滤波器组件的外壳电连接。

公开(公告)号：US06353524B1

公开(公告)日：2002-03-05

申请号：US09527865

申请日：2000-03-17

申请人： Jeffrey Hubert Sloan

发明人： Jeffrey Hubert Sloan

IPC分类号： H02H322

CPC分类号： H03K19/00315

摘要： The invention comprises an input/output circuit of an integrated circuit chip that includes a pad, a protection circuit connected to the pad, and an up-shift circuit connected to the pad and the protection circuit. The up-shift circuit provides a DC bias voltage to signals received by the pad to protect the protection circuit. With the invention, the protection circuit includes only single gate-oxide devices.

摘要翻译： 本发明包括集成电路芯片的输入/输出电路，其包括焊盘，连接到焊盘的保护电路，以及连接到焊盘和保护电路的上移电路。 上移电路为由垫提供的信号提供DC偏置电压，以保护保护电路。 通过本发明，保护电路仅包括单个栅极氧化器件。