公开(公告)号：US10521921B2

公开(公告)日：2019-12-31

申请号：US15476100

申请日：2017-03-31

Applicant: STMicroelectronics (Research & Development) Limited ,  STMicroelectronics, Inc.

Inventor： Xiaoyong Yang ,  Neale Dutton

IPC: G01S17/89 ,  G06T7/55 ,  G06T7/73 ,  G06T7/521 ,  H04N5/235 ,  G01S17/02 ,  G01S7/48 ,  G01S7/497 ,  G06K9/00 ,  G07C9/00

Abstract: An apparatus includes time of flight single-photon avalanche diode (ToF SPAD) circuitry. The ToF SPAD circuitry generates indications of distance between the apparatus and an object within a field of view. A processor receives the indications of distance and controls at least one image sensor, such as a camera, to capture at least one image based on at least one indication of distance. The processor determines whether an image is a true representation of an expected object by comparing multiple indications of distance associated with the object to an expected object distance profile and comparing the image to at least one expected object image.

公开(公告)号：US10520552B2

公开(公告)日：2019-12-31

申请号：US15455321

申请日：2017-03-10

Applicant: STMicroelectronics, Inc. ,  STMicroelectronics International N.V.

Inventor： K. R. Hariharasudhan ,  Frank J. Sigmund

IPC: G01R31/36 ,  G01R31/367 ,  G01R31/3842

Abstract: An electronic device includes a processor coupled to a battery and to determine whether the battery is being charged or discharged. If the battery being is being discharged, the processor operates to calculate an amount by which the battery has discharged since a preceding calculation of remaining capacity of the battery, compensate the amount by which the battery has discharged for a condition of the battery, and calculate a remaining capacity of the battery as a function of the amount by which the battery has discharged. If the battery is being charged, the processor operates to calculate an amount by which the battery has charged since a preceding calculation of remaining capacity of the battery, compensate the amount by which the battery has charged for a condition of the battery, and calculate the remaining capacity of the battery as a function of the amount by which the battery has charged.

公开(公告)号：US10480941B2

公开(公告)日：2019-11-19

申请号：US16284448

申请日：2019-02-25

Applicant: STMicroelectronics, Inc.

Inventor： Mahesh Chowdhary ,  Sankalp Dayal

IPC: G01C19/32 ,  G01C19/5776 ,  G01P15/18

Abstract: A sensor chip is mounted on a PCB and electrically connected to a SOC mounted on the PCB via at least one conductive trace. The sensor chip includes configuration registers storing and outputting configuration data, and a PLD receiving digital data. The PLD performs an extraction of features of the digital data in accordance with the configuration data, and the configuration data includes changeable parameters of the extraction. A classification unit processes the extracted features of the digital data so as to generate a context of an electronic device into which the sensor chip is incorporated relative to its surroundings, the processing being performed in using a processing technique operating in accordance with the configuration data. The configuration data also includes changeable parameters of the processing technique. The classification unit outputs the context to data registers for storage.

公开(公告)号：US10461019B2

公开(公告)日：2019-10-29

申请号：US16136709

申请日：2018-09-20

Applicant: STMicroelectronics, Inc.

Inventor： Aaron Cadag ,  Ian Harvey Arellano ,  Ela Mia Cadag

IPC: H01L21/44 ,  H01L23/495 ,  H01L23/00 ,  H01L21/78 ,  H01L21/56 ,  H01L23/31 ,  H01L23/544

Abstract: A semiconductor package formed utilizing a removable backside protective layer includes a leadframe, a die pad, leads and a molding compound around them. The first surface of the die pad and leads are exposed to an external environment by the plurality of recesses. The recesses are formed by coupling a removable backside protective layer to the leadframe before applying the molding compound. After the molding compound is applied and cured, the backside protective layer is removed to expose the first surface of the die pad and the first surfaces of the leads so the semiconductor package may be mounted within an electronic device. The removable backside protective layer protects the die pad and the leads from mold flashing and residue when forming the semiconductor package during the fabrication process.

公开(公告)号：US20190326201A1

公开(公告)日：2019-10-24

申请号：US16460704

申请日：2019-07-02

Applicant: STMICROELECTRONICS, INC.

Inventor： Frederick Ray GOMEZ ,  Tito Mangaoang, JR. ,  Jefferson Talledo

IPC: H01L23/495 ,  H01L21/56 ,  H01L23/60 ,  H01L21/48

Abstract: According to principles of the disclosure as explained herein, selected leads are electrically connected through metal strips to the lead frame until the end of the manufacturing process. The lead frame is grounded through the manufacturing process to prevent any ESD event from causing damage to the protected leads. In the final singulation step, the leads are electrically isolated from each other and from the lead frame, thus maintaining protection from a potential ESD event up until the final package singulation step.

公开(公告)号：US10446670B2

公开(公告)日：2019-10-15

申请号：US14953574

申请日：2015-11-30

Applicant: International Business Machines Corporation ,  STMicroelectronics, Inc.

Inventor： Bruce B. Doris ,  Hong He ,  Junli Wang ,  Nicolas J. Loubet

IPC: H01L29/76 ,  H01L29/66 ,  H01L29/78 ,  H01L27/092 ,  H01L29/10 ,  H01L29/165 ,  H01L29/423 ,  H01L21/265 ,  H01L21/8238

Abstract: A method of forming a finFET transistor device includes forming a crystalline, compressive strained silicon germanium (cSiGe) layer over a substrate; masking a first region of the cSiGe layer so as to expose a second region of the cSiGe layer; subjecting the exposed second region of the cSiGe layer to an implant process so as to amorphize a bottom portion thereof and transform the cSiGe layer in the second region to a relaxed SiGe (rSiGe) layer; performing an annealing process so as to recrystallize the rSiGe layer; epitaxially growing a tensile strained silicon layer on the rSiGe layer; and patterning fin structures in the tensile strained silicon layer and in the first region of the cSiGe layer.

公开(公告)号：US10420140B2

公开(公告)日：2019-09-17

申请号：US15729017

申请日：2017-10-10

Applicant: STMicroelectronics, Inc.

Inventor： Oleg Logvinov ,  Aidan Cully ,  David Lawrence ,  Michael J. Macaluso

IPC: H04W74/08 ,  H04L12/18 ,  H04L29/06 ,  H04B3/54 ,  H04L12/413 ,  H04L1/18 ,  H04L12/761 ,  H04L1/00

Abstract: Multicast transmissions are efficient but do not allow for individual acknowledgement that the data was received by each receiver. This is not acceptable for isochronous systems that require specific levels of QoS for each device. A multimedia communications protocol is provided that uses a novel multi-destination burst transmission protocol in multimedia isochronous systems. The transmitter establishes a bi-directional burst mode for multicasting data to multiple devices and receiving Reverse Start of Frame (RSOF) delimiters from each multicast-destination receiver in response to multiple SOF delimiters, thus providing protocol-efficient multi-destination acknowledgements.

公开(公告)号：US20190267991A1

公开(公告)日：2019-08-29

申请号：US16274844

申请日：2019-02-13

Applicant: STMicroelectronics S.r.l. ,  STMicroelectronics, Inc. ,  STMicroelectronics (Alps) SAS

Inventor： Vanni Poletto ,  David F. Swanson ,  Giovanni Luca Torrisi ,  Laurent Chevalier

IPC: H03K17/687 ,  G05B11/42 ,  G01R19/165

Abstract: A circuit for controlling a first plurality of transistors connected in parallel and a second plurality of transistors connected in parallel, includes: a first plurality of stages, a respective one of the first plurality of stages being configured to supply a first control signal to a respective one of the first plurality of transistors; and a second plurality of stages, a respective one of the second plurality of stages being configured to supply a second control signal to a respective one of the second plurality of transistors. An output current of the respective one of the first plurality of stages is regulated based on a difference between a first value representative of a sum of output currents of each stage of the first plurality of stages and a second value representative of a sum of set points assigned to the first plurality of stages.

公开(公告)号：US20190267310A1

公开(公告)日：2019-08-29

申请号：US16264824

申请日：2019-02-01

Applicant: STMicroelectronics, Inc.

Inventor： Rennier RODRIGUEZ ,  Maiden Grace MAMING ,  Jefferson TALLEDO

IPC: H01L23/495 ,  H01L23/00 ,  H01L21/48

Abstract: The present disclosure is directed to a lead frame including a die pad with cavities, and methods for attaching a semiconductor die to the lead frame. The cavities allow for additional adhesive to be formed on the die pad at the corners of the semiconductor die, and prevent the additional adhesive from overflowing on to active areas of the semiconductor die.

公开(公告)号：US20190217611A1

公开(公告)日：2019-07-18

申请号：US16357077

申请日：2019-03-18

Applicant: STMICROELECTRONICS, INC. ,  STMICROELECTRONICS INTERNATIONAL N.V. ,  STMICROELECTRONICS S.R.L.

Inventor： Simon DODD ,  David S. HUNT ,  Joseph Edward SCHEFFELIN ,  Dana GRUENBACHER ,  Stefan H. HOLLINGER ,  Uwe SCHOBER ,  Peter JANOUCH

IPC: B41J2/14 ,  B41J2/175

CPC classification number: B41J2/1433 ,  B41J2/14072 ,  B41J2/14201 ,  B41J2/1753 ,  B41J2/17553 ,  B41J2002/14362 ,  B41J2002/14491

Abstract: The present disclosure provides supports for microfluidic die that allow for nozzles of the microfluidic die to be on a different plane or face a different direction from electrical contacts on the same support. This includes a rigid support having electrical contacts on a different side of the rigid support with respect to a direction of ejection of the nozzles, and a semi-flexible support or semi-rigid support that allow the electrical contacts to be moved with respect to a direction of ejection of the nozzles. The semi-flexible and semi-rigid supports allow the die to be up to and beyond a 90 degree angle with respect to a plane of the electrical contacts. The different supports allow for a variety of positions of the microfluidic die with respect to a position of the electrical contacts.