公开(公告)号：US11355423B2

公开(公告)日：2022-06-07

申请号：US16584405

申请日：2019-09-26

Applicant: STMICROELECTRONICS, INC.

Inventor： Aaron Cadag ,  Frederick Arellano ,  Ernesto Antilano, Jr.

IPC: H01L23/495 ,  H01L23/00 ,  H01L21/56 ,  H01L23/31 ,  B81B7/00 ,  B81C1/00

Abstract: A MEMS pressure sensor packaged with a molding compound. The MEMS pressure sensor features a lead frame, a MEMS semiconductor die, a second semiconductor die, multiple pluralities of bonding wires, and a molding compound. The MEMS semiconductor die has an internal chamber, a sensing component, and apertures. The MEMS semiconductor die and the apertures are exposed to an ambient atmosphere. A method is desired to form a MEMS pressure sensor package that reduces defects caused by mold flashing and die cracking. Fabrication of the MEMS pressure sensor package comprises placing a lead frame on a lead frame tape; placing a MEMS semiconductor die adjacent to the lead frame and on the lead frame tape with the apertures facing the tape and being sealed thereby; attaching a second semiconductor die to the MEMS semiconductor die; attaching pluralities of bonding wires to form electrical connections between the MEMS semiconductor die, the second semiconductor die, and the lead frame; and forming a molding compound.

公开(公告)号：US09953933B1

公开(公告)日：2018-04-24

申请号：US15474904

申请日：2017-03-30

Applicant: STMicroelectronics, Inc.

Inventor： Aaron Cadag ,  Rennier Rodriguez ,  Ela Mia Cadag

IPC: H01L23/552 ,  H01L23/00 ,  B32B7/12 ,  H01L21/78 ,  H01L23/498 ,  H01L23/31 ,  H01L21/56 ,  H01L21/48

CPC classification number: H01L23/552 ,  B32B7/12 ,  B32B2457/14 ,  H01L21/4853 ,  H01L21/561 ,  H01L21/78 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/49811 ,  H01L23/49816 ,  H01L24/29 ,  H01L24/48 ,  H01L24/85 ,  H01L24/97 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48229 ,  H01L2224/48992 ,  H01L2924/15311 ,  H01L2924/3025

Abstract: A semiconductor package includes a substrate, a die, an insulating die attach film, a dummy die, a conductive layer, and an electrically conductive molding compound or encapsulant. The first surface of the substrate includes a plurality of internal leads, and the second surface of the substrate includes a plurality of external electrically conductive pads and an electrically conductive ground terminal. A non-conductive flow over wire die attach film is placed to surround and encase the die. The dummy die overlies the die and a conductive layer overlies the dummy die. The electrically conductive molding compound is formed to encase the various components of the semiconductor device. The electrically conductive molding compound is electrically coupled to the electrically conductive ground terminal and the conductive layer forming an EMI shield for the die in the package.

公开(公告)号：US20190019745A1

公开(公告)日：2019-01-17

申请号：US16136709

申请日：2018-09-20

Applicant: STMicroelectronics, Inc.

Inventor： Aaron Cadag ,  Ian Harvey Arellano ,  Ela Mia Cadag

IPC: H01L23/495 ,  H01L21/56 ,  H01L23/00 ,  H01L21/78 ,  H01L21/683 ,  H01L23/31

Abstract: A semiconductor package formed utilizing a removable backside protective layer includes a leadframe, a die pad, leads and a molding compound around them. The first surface of the die pad and leads are exposed to an external environment by the plurality of recesses. The recesses are formed by coupling a removable backside protective layer to the leadframe before applying the molding compound. After the molding compound is applied and cured, the backside protective layer is removed to expose the first surface of the die pad and the first surfaces of the leads so the semiconductor package may be mounted within an electronic device. The removable backside protective layer protects the die pad and the leads from mold flashing and residue when forming the semiconductor package during the fabrication process.

公开(公告)号：US20180016133A1

公开(公告)日：2018-01-18

申请号：US15212107

申请日：2016-07-15

Applicant: STMicroelectronics, Inc.

Inventor： Aaron Cadag ,  Frederick Arellano ,  Ernesto Antilano, JR.

IPC: B81B7/00 ,  H01L23/31 ,  H01L21/56 ,  H01L23/495 ,  H01L23/00 ,  B81C1/00

Abstract: A MEMS pressure sensor packaged with a molding compound. The MEMS pressure sensor features a lead frame, a MEMS semiconductor die, a second semiconductor die, multiple pluralities of bonding wires, and a molding compound. The MEMS semiconductor die has an internal chamber, a sensing component, and apertures. The MEMS semiconductor die and the apertures are exposed to an ambient atmosphere. A method is desired to form a MEMS pressure sensor package that reduces defects caused by mold flashing and die cracking. Fabrication of the MEMS pressure sensor package comprises placing a lead frame on a lead frame tape; placing a MEMS semiconductor die adjacent to the lead frame and on the lead frame tape with the apertures facing the tape and being sealed thereby; attaching a second semiconductor die to the MEMS semiconductor die; attaching pluralities of bonding wires to form electrical connections between the MEMS semiconductor die, the second semiconductor die, and the lead frame; and forming a molding compound.

公开(公告)号：US10910295B2

公开(公告)日：2021-02-02

申请号：US16712789

申请日：2019-12-12

Applicant: STMicroelectronics, Inc.

Inventor： Aaron Cadag ,  Ernesto Antilano, Jr. ,  Ela Mia Cadag

IPC: H01L23/495 ,  H01L23/31 ,  H01L21/48 ,  H01L23/498 ,  H01L21/56 ,  H01L21/78

Abstract: The present disclosure is directed to a leadframe package having solder wettable sidewalls that is formed using a pre-molded leadframe and methods of manufacturing the same. A metal plated leadframe with a plurality of recesses and a plurality of apertures is placed into a top and bottom mold tool. A molding compound is then formed in the plurality of recesses and apertures in the leadframe to form a pre-molded leadframe. A plurality of die and wires are coupled to the pre-molded leadframe and the resulting combination is covered in an encapsulant. Alternatively, a bare leadframe can be processed and the metal layer can be applied after encapsulation. A saw or other cutting means is used for singulation to form leadframe packages. Each resulting leadframe package has a solder wettable sidewall for improving the strength of solder joints between the package and a circuit board.

公开(公告)号：US10903172B2

公开(公告)日：2021-01-26

申请号：US16698727

申请日：2019-11-27

Applicant: STMicroelectronics, Inc.

Inventor： Aaron Cadag ,  Lester Joseph Belalo ,  Ela Mia Cadag

IPC: H01L23/495 ,  H01L23/00 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L21/78

Abstract: A semiconductor package formed utilizing multiple etching steps includes a lead frame, a die, and a molding compound. The lead frame includes leads and a die pad. The leads and the die pad are formed from a first conductive material by the multiple etching steps. More specifically, the leads and the die pad of the lead frame are formed by at least three etching steps. The at least three etching steps including a first etching step, a second undercut etching step, and a third backside etching step. The second undercut etching step forming interlocking portions at an end of each lead. The end of the lead is encased in the molding compound. This encasement of the end of the lead with the interlocking portion allows the interlocking portion to mechanically interlock with the molding compound to avoid lead pull out. In addition, by utilizing at least three etching steps the leads can be formed to have a height that is greater than the die pad of the lead frame. This differential in height reduces the span of wires used to form electrical connections within the semiconductor package. These reductions in the span of the wires reduces the chances of wire to wire and wire to die short circuiting because the wire sweep of the wires is reduced when the molding compound is placed.

公开(公告)号：US10541196B2

公开(公告)日：2020-01-21

申请号：US16107807

申请日：2018-08-21

Applicant: STMicroelectronics, Inc.

Inventor： Aaron Cadag ,  Ernesto Antilano, Jr. ,  Ela Mia Cadag

IPC: H01L23/495 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L21/78

Abstract: The present disclosure is directed to a leadframe package having solder wettable sidewalls that is formed using a pre-molded leadframe and methods of manufacturing the same. A metal plated leadframe with a plurality of recesses and a plurality of apertures is placed into a top and bottom mold tool. A molding compound is then formed in the plurality of recesses and apertures in the leadframe to form a pre-molded leadframe. A plurality of die and wires are coupled to the pre-molded leadframe and the resulting combination is covered in an encapsulant. Alternatively, a bare leadframe can be processed and the metal layer can be applied after encapsulation. A saw or other cutting means is used for singulation to form leadframe packages. Each resulting leadframe package has a solder wettable sidewall for improving the strength of solder joints between the package and a circuit board.

公开(公告)号：US10079198B1

公开(公告)日：2018-09-18

申请号：US15610088

申请日：2017-05-31

Applicant: STMicroelectronics, Inc.

Inventor： Aaron Cadag ,  Ernesto Antilano, Jr. ,  Ela Mia Cadag

IPC: H01L23/495 ,  H01L21/56 ,  H01L21/78 ,  H01L23/31 ,  H01L21/48

CPC classification number: H01L23/49541 ,  H01L21/4853 ,  H01L21/561 ,  H01L21/565 ,  H01L21/78 ,  H01L23/3121 ,  H01L23/3192 ,  H01L23/49503 ,  H01L23/4952 ,  H01L23/49548 ,  H01L23/49582 ,  H01L23/49861 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: The present disclosure is directed to a leadframe package having solder wettable sidewalls that is formed using a pre-molded leadframe and methods of manufacturing the same. A metal plated leadframe with a plurality of recesses and a plurality of apertures is placed into a top and bottom mold tool. A molding compound is then formed in the plurality of recesses and apertures in the leadframe to form a pre-molded leadframe. A plurality of die and wires are coupled to the pre-molded leadframe and the resulting combination is covered in an encapsulant. Alternatively, a bare leadframe can be processed and the metal layer can be applied after encapsulation. A saw or other cutting means is used for singulation to form leadframe packages. Each resulting leadframe package has a solder wettable sidewall for improving the strength of solder joints between the package and a circuit board.

公开(公告)号：US11929259B2

公开(公告)日：2024-03-12

申请号：US17353684

申请日：2021-06-21

Applicant: STMICROELECTRONICS, INC.

Inventor： Ian Harvey Arellano ,  Aaron Cadag ,  Ela Mia Cadag

IPC: H01L21/48 ,  H01L23/00 ,  H01L23/31 ,  H01L23/495 ,  H01L21/56

CPC classification number: H01L21/4821 ,  H01L23/3121 ,  H01L23/49503 ,  H01L23/49513 ,  H01L23/49541 ,  H01L23/49575 ,  H01L24/45 ,  H01L24/48 ,  H01L21/561 ,  H01L21/565 ,  H01L24/32 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L24/92 ,  H01L24/97 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48245 ,  H01L2224/73265 ,  H01L2224/92247

Abstract: The present disclosure is directed to leadless semiconductor packages with improved wettable flanks that encourage the formation of solder fillets when the leadless semiconductor package is mounted to a substrate. The solder fillets are consistently formed and are easily detectable by inspection systems, such as automated optical inspection (AOI) systems.

公开(公告)号：US11916090B2

公开(公告)日：2024-02-27

申请号：US17342765

申请日：2021-06-09

Applicant: STMicroelectronics, Inc.

Inventor： Aaron Cadag ,  Rohn Kenneth Serapio ,  Ela Mia Cadag

IPC: H01L31/0203 ,  H01L27/146 ,  H01L23/495 ,  H01L23/31 ,  H01L21/56 ,  H01L23/00

CPC classification number: H01L27/14618 ,  H01L21/56 ,  H01L23/3157 ,  H01L23/49503 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/16258 ,  H01L2224/8184

Abstract: A first side of a tapeless leadframe package is etched to form a ring shaped protrusion and a lead protrusion extending from a base layer. An integrated circuit die is mounted to tapeless leadframe package in flip chip orientation with a front side facing the first side. An electrical and mechanical attachment is made between a bonding pad of the integrated circuit die and the lead protrusion. A mechanical attachment is made between the front side of the integrated circuit die and the ring shaped protrusion. The integrated circuit die and the protrusions from the tapeless leadframe package are encapsulated within an encapsulating block. The second side of the tapeless leadframe package is then etched to remove portions of the base layer and define a lead for a leadframe from the lead protrusion and further define a die support for the leadframe from the ring shaped protrusion.