公开(公告)号：US20140289736A1

公开(公告)日：2014-09-25

申请号：US14219835

申请日：2014-03-19

Applicant: STMicroelectronics Asia Pacific Pte Ltd ,  STMicroelectronics (Grenoble 2) SAS

Inventor： Raphael Collado ,  Shivachitta S. Walishetty ,  Ling Yu Cheng

IPC: G06F9/50

CPC classification number: G09G5/363 ,  G06F3/1423 ,  G06F9/50 ,  G06F9/5011 ,  G06F2209/5011 ,  G06T1/20 ,  G09G5/005 ,  G09G5/14 ,  G09G2360/127 ,  G09G2360/18

Abstract: Resources of multiple systems are managed in a computer device. A first processing system having a set of dedicated resources also has a resource manager to manage at least one of the resources. The first processing system is prevented from directly accessing the resources without authorization. A second processing system, connected to the set of dedicated resources, has a supervisor application to grant control to individual resources to the resource manager of the first processing system. A computer program is executed in the first processing system. The supervisor application grants control of at least one resource to the resource manager of the first processing system in a way that is transparently to the computer program executing in the first processing system.

Abstract translation: 多个系统的资源在计算机设备中进行管理。 具有一组专用资源的第一处理系统还具有资源管理器来管理资源中的至少一个。 防止第一个处理系统在未经授权的情况下直接访问资源。 连接到该专用资源集合的第二处理系统具有向第一处理系统的资源管理器授予对单个资源的控制的管理程序应用程序。 在第一处理系统中执行计算机程序。 主管应用以对第一处理系统中执行的计算机程序透明的方式向第一处理系统的资源管理器授予对至少一个资源的控制。

公开(公告)号：US20140117950A1

公开(公告)日：2014-05-01

申请号：US13662612

申请日：2012-10-29

Applicant: STMICROELECTRONICS ASIA PACIFIC PTE LTD

Inventor： Eng Jye Ng ,  Kien Beng Tan

IPC: G05F1/10

CPC classification number: G05F1/575

Abstract: A voltage regulator circuit includes a differential amplifier stage. The gate terminal of a first n-channel MOSFET is coupled to an output of the differential amplifier stage. A resistor is coupled between the drain terminal and gate terminal of the first n-channel MOSFET. The drain terminal of the first n-channel MOSFET drives the gate of a second n-channel MOSFET whose drain terminal is at the input of a current mirror circuit. An output of the current mirror circuit forms the regulated voltage output. A feedback circuit is coupled between the regulated voltage output and one input of the voltage regulator circuit. Another input of the voltage regulator circuit is configured to receive a reference voltage.

Abstract translation: 电压调节器电路包括差分放大器级。 第一n沟道MOSFET的栅极端子耦合到差分放大器级的输出端。 电阻器耦合在第一n沟道MOSFET的漏极端子和栅极端子之间。 第一n沟道MOSFET的漏极端子驱动漏极端子处于电流镜电路的输入端的第二n沟道MOSFET的栅极。 电流镜电路的输出形成稳压电压输出。 反馈电路耦合在稳压电压输出和稳压电路的一个输入端之间。 电压调节器电路的另一输入被配置为接收参考电压。

公开(公告)号：US20140103476A1

公开(公告)日：2014-04-17

申请号：US13651526

申请日：2012-10-15

Applicant: STMICROELECTRONICS ASIA PACIFIC PTE. LTD.

Inventor： Yonggang JIN ,  Laurent Herard ,  WeeChinJudy Lim

IPC: H01L31/0232 ,  H01L31/0203

CPC classification number: H01L31/0203 ,  H01L27/14618 ,  H01L27/14625 ,  H01L27/14632 ,  H01L27/14687 ,  H01L31/0232 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of making image sensor devices may include forming a sensor layer including image sensor ICs in an encapsulation material, bonding a spacer layer to the sensor layer, the spacer layer having openings therein and aligned with the image sensor ICs, and bonding a lens layer to the spacer layer, the lens layer including lens in an encapsulation material and aligned with the openings and the image sensor ICs. The method may also include dicing the bonded-together sensor, spacer and lens layers to provide the image sensor devices. Helpfully, the method may use WLP to enhance production.

Abstract translation: 制作图像传感器装置的方法可以包括在封装材料中形成包括图像传感器IC的传感器层，将间隔层粘合到传感器层，间隔层在其中具有开口并与图像传感器IC对准，并且将透镜层 到间隔层，透镜层包括在封装材料中并与开口对准的透镜和图像传感器IC。 该方法还可以包括切割结合在一起的传感器，间隔物和透镜层以提供图像传感器装置。 有利的是，该方法可以使用WLP来增强生产。

公开(公告)号：US20130250178A1

公开(公告)日：2013-09-26

申请号：US13797362

申请日：2013-03-12

Applicant: STMICROELECTRONICS ASIA PACIFIC PTE., LTD

Inventor： Patricia Chiang Wei Yin

IPC: H04N9/78

CPC classification number: H04N9/78 ,  G06T7/20 ,  G06T2207/10024 ,  H04N5/144 ,  H04N7/0125

Abstract: Systems and methods are disclosed herein for a motion detection system for video signal processing that includes a luminance motion detector, a chroma motion detector, and a smoothness detector. These systems and methods may also include a phase motion detector, a baseband YC separation circuitry for video signal processing, a chip for video signal processing, and a video signal processing system used in an electronic article.

Abstract translation: 本文公开了用于视频信号处理的运动检测系统的系统和方法，其包括亮度运动检测器，色度运动检测器和平滑度检测器。 这些系统和方法还可以包括相位运动检测器，用于视频信号处理的基带YC分离电路，用于视频信号处理的芯片，以及在电子制品中使用的视频信号处理系统。

公开(公告)号：US20040150461A1

公开(公告)日：2004-08-05

申请号：US10703099

申请日：2003-11-06

Applicant: STMicroelectronics Asia Pacific Pte Ltd

Inventor： Yann Desprez-Le Goarant ,  Kok-Yong Tan

IPC: H03K017/60

CPC classification number: H03K17/6257

Abstract: An audio signal switch has a plurality of inputs and an output. Each input is arranged to be selectively connected to the output via a respective transmission chain, each transmission chain includes: a first bipolar transistor, of a first type, connected to the input; a second bipolar transistor, of a second type, complementary to said first configuration, connected to the output; and an intermediate bipolar transistor, of the second type, connected between said first and second transistors. The first and second transistors are arranged in an emitter-follower circuit configuration, and the intermediate transistor is arranged to act as a diode to protect the first transistor from a large reverse voltage applied to its base-emitter junction.

Abstract translation: 音频信号开关具有多个输入和输出。 每个输入被布置为经由相应的传输链选择性地连接到输出，每个传输链包括：连接到输入的第一类型的第一双极晶体管; 与所述第一配置互补的第二类型的连接到所述输出的第二双极晶体管; 以及连接在所述第一和第二晶体管之间的第二类型的中间双极晶体管。 第一和第二晶体管被布置成射极跟随器电路配置，并且中间晶体管被配置为充当二极管，以保护第一晶体管免受施加到其基极 - 发射极结的大的反向电压。

公开(公告)号：US20040115879A1

公开(公告)日：2004-06-17

申请号：US10662225

申请日：2003-09-12

Applicant: STMicroelectronics Asia Pacific Pte Ltd

Inventor： Bernard Plessier ,  Ming Kiat Yap

IPC: H01L021/8238

CPC classification number: G11C7/18 ,  G11C19/00 ,  G11C19/28 ,  G11C19/287

Abstract: A memory comprises at least one array of memory elements, a partition of the at least one array into a plurality of sub-arrays of the memory elements, and an array configuration circuit for selectively putting the at least one array in one of two operating configurations. In a first operating configuration, the memory elements of the at least one array are coupled one to another to form a monodimensional sequentially-accessible memory, while in a second operating configuration the memory elements in each sub-array are coupled to one another so as to form an independent monodimensional sequentially-accessible memory block, a data content of any memory element of the sub-array being rotatable by shifts through the memory elements of the sub-array. A sub-array selector, responsive to a first memory address, selects one among the at least two sub-arrays according to the first memory address, and enables access to the selected sub-array. A memory element access circuit, responsive to a second memory address, enables access to a prescribed memory element in the selected sub-array after a prescribed number of shifts of the data content of the memory elements in the selected sub-array depending on the second memory address.

Abstract translation: 存储器包括存储器元件的至少一个阵列，至少一个阵列的划分成存储器元件的多个子阵列，以及阵列配置电路，用于选择性地将至少一个阵列放置在两种操作配置之一中 。 在第一操作配置中，所述至少一个阵列的存储器元件彼此耦合以形成一维顺序可访问的存储器，而在第二操作配置中，每个子阵列中的存储器元件彼此耦合，以便 为了形成独立的单维顺序可访问的存储块，子阵列的任何存储元件的数据内容可以通过移位通过子阵列的存储元件来旋转。 响应于第一存储器地址的子阵列选择器根据第一存储器地址在所述至少两个子阵列中选择一个，并使能够访问所选择的子阵列。 存储器元件访问电路响应于第二存储器地址，使得能够在所选择的子阵列中的存储元件的数据内容的规定数量的移位之后，根据第二存储器地址访问所选择的子阵列中的规定的存储器元件 内存地址。