公开(公告)号：US20010033245A1

公开(公告)日：2001-10-25

申请号：US09773300

申请日：2001-01-31

Applicant: STMicroelectronics S.r.I.

Inventor： Fabrizio Campanale ,  Salvatore Nicosia ,  Francesco Tomaiuolo ,  Luca Giuseppe De Ambroggi ,  Promod Kumar ,  Luigi Pascucci

IPC: H03M001/00

CPC classification number: G11C7/1057 ,  G11C7/1018 ,  G11C7/1039 ,  G11C7/1042 ,  G11C7/1045 ,  G11C7/1051 ,  G11C7/106 ,  G11C7/1069 ,  G11C7/1072 ,  G11C7/22 ,  G11C8/04 ,  G11C8/18

Abstract: A multipurpose memory device suitable for a broader range of applications, whether requiring the reading of data in an asynchronous mode with random access (as in a standard memory) or in a synchronous sequential mode with sequential or burst type access, is capable of recognizing the mode of access and the mode of reading that is currently required by the microprocessor. The memory device self-conditions its internal circuitry as a function of such a recognition in order to read data in the requested mode without requiring the use of additional external control signals and/or implying a penalization in terms of access time and reading time compared to those which, for the same fabrication technology and state of the art design, may be attained with memory devices specifically designed for either one or the other mode of operation.

Abstract translation: 适用于更广泛应用的多用途存储器件，无论是要求以随机存取（如在标准存储器中）或具有顺序或突发型访问的同步顺序模式的异步模式中的数据读取，都能够识别 访问模式和微处理器当前需要的读取模式。 存储器设备将其内部电路作为这种识别的功能进行自我调整，以便以所请求的模式读取数据，而不需要使用额外的外部控制信号和/或暗示相对于访问时间和读取时间的惩罚 对于相同的制造技术和现有技术设计的那些，可以通过专门为一种或另一种操作模式设计的存储器件来实现。