Abstract:
A method for monitoring the execution of a sequence of instruction codes in an integrated circuit comprising a central processing unit provided for executing such instruction codes. Current cumulative signatures are produced using deterministic address, control or data logic signals involved in the execution of the sequence and taken off at various points of the integrated circuit. A final cumulative signature is compared with an expected signature and an error signal is produced if the two signatures are not identical. Particularly useful to secure integrated circuits for smart cards.
Abstract:
The invention concerns a circuit for multi-standard wireless RF transmission comprising: input circuitry (302 to 314) for generating a transmission signal (IT(t), QT(t)) based on an input data signal (I, Q); a power amplifier (316) adapted to amplify said transmission signal to provide an output signal (S(t)) for transmission via at least one antenna; and feedback circuitry (320 to 340) comprising at least one variable low-pass filter (334, 336) for generating a feedback signal (IFB, QFB) based on said output signal, wherein said input circuitry further comprises pre-distortion circuitry (302) adapted to modify said input data signal (I, Q) based on said feedback signal.
Abstract:
An image sensor has a per-column ADC arrangement including first and second capacitors allowing a comparator circuit to perform correlated double sampling. The capacitors are continuously connected to, respectively, the analog pixel signal and a ramp signal without use of a hold operation. The comparator circuit comprises a differential input being connected to the junction of the two capacitors and being biased by a reference signal. The reference signal is preferably sampled and held from a reference voltage. The use of a differential input as first stage of the comparator addresses problems arising from ground voltage bounce when a large pixel array images a scene with low contrast. Connectivity of the differential input stage allows the ramp signal to see a constant capacitive load thus reduce image artifacts referred to as smear.
Abstract:
A radiofrequency signal power amplification circuit may include a signal input for receiving the radiofrequency signal, an amplification stage coupled to the signal input and having at least one power transistor, a biasing stage for delivering a bias voltage to the amplification stage, and a processing stage. The processing stage may include a processing input coupled to the signal input, a processing output for delivering a bias current modulated at least in amplitude to the biasing stage, and an amplitude modulator coupled between the processing input and the processing output and configured to determine an envelope signal representative of the envelope of the radiofrequency signal, for modulating the amplitude of the envelope signal based on a variable voltage setpoint and for generating the amplitude-modulated bias current based on the modulated envelope signal.
Abstract:
A method for transmitting data between a first and a second point comprises the steps of transmitting data, from the first to the second point, together with a signature comprising bits of a first authentication code, and transmitting an acknowledgement, from the second to the first point. The length of the first authentication code is greater than the length of the signature and the first authentication code comprises hidden authentication bits. The acknowledgement is produced by using hidden authentication bits of a second authentication code presumed to be identical to the first, produced at the second point.
Abstract:
Device comprising processing means (MT), transmission channels (VE1, . . . VEn), an antenna array for transmitting signals comprising a number of antennas (A11 . . . A1n) respectively associated with the transmission channels, a number of digital-analogue converters (DAC) and a number of phase-shifting means (MD1, . . . MDn) respectively associated with the antennas, said phase-shifting means (MD1, . . . MDn) being placed between the processing means (MT) and the digital-analogue converters (DAC) and including digital all-pass filters of FIR type (PT), the processing means comprising control means (MC) configured to adjust the coefficients and/or the order of the all-pass filters of FIR type.
Abstract:
An image sensor having a semiconductor substrate, at least two photosites in the substrate and an isolation region between the photosites. The isolation region has a first trench covered by a thin electrically insulating liner and filled with an electrically conductive material, the conductive material has a second trench at least partially filled with an optically isolating material.
Abstract:
A method for transmitting data between a first and a second point comprises the steps of transmitting data, from the first to the second point, together with a signature comprising bits of a first authentication code, and transmitting an acknowledgement, from the second to the first point. The length of the first authentication code is greater than the length of the signature and the first authentication code comprises hidden authentication bits. The acknowledgement is produced by using hidden authentication bits of a second authentication code presumed to be identical to the first, produced at the second point.
Abstract:
An integrated circuit protected against electrostatic discharges, including: first and second supply rails; first and second intermediary rails normally connected to the first and second supply rails; inverters formed of a P-channel MOS transistor series-connected to an N-channel MOS transistor, the sources of the P-channel and N-channel MOS transistors being respectively connected to the first and second supply rails and the bodies of the P-channel and N-channel transistors being respectively connected to the first and second intermediary rails; a positive overvoltage detector between the first and second supply rails; and a switch for connecting the first and second intermediary rails to the second and first supply rails when a positive overvoltage is detected.
Abstract:
An integrated circuit includes a bipolar transistor comprising a substrate and a collector formed in the substrate. The collector includes a highly doped lateral zone, a very lightly doped central zone and a lightly doped intermediate zone located between the central zone and the lateral zone 4a of the collector. The substrate includes a lightly doped lateral zone and a highly doped central zone. The dopant species in the zone of the substrate are electrically inactive.